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MIPS: features: Add initial support for TLBINVF capable cores

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New Aptiv cores support the TLBINVF instruction for flushing
the VTLB.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6130/
This commit is contained in:
Leonid Yegoshin
2013-11-14 16:12:23 +00:00
committed by Ralf Baechle
parent c01905eeee
commit 1745c1ef88
3 changed files with 9 additions and 0 deletions
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3
arch/mips/include/asm/cpu-features.h
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@ -20,6 +20,9 @@
#ifndef cpu_has_tlb
#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB)
#endif
#ifndef cpu_has_tlbinv
#define cpu_has_tlbinv (cpu_data[0].options & MIPS_CPU_TLBINV)
#endif
/*
* For the moment we don't consider R6000 and R8000 so we can assume that