drm/i915: vlv: reserve GT power context early
We reserve the space for the power context in stolen memory at a fixed address from a delayed work. This races with the subsequent driver init/resume code which could allocate something at that address, so the reservation for the power context fails. Reserve the space up-front, so this can't happen. This also adds a missing struct_mutex lock around the stolen allocation, which wasn't taken in the delayed work path. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -3493,6 +3493,8 @@ static void valleyview_setup_pctx(struct drm_device *dev)
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u32 pcbr;
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int pctx_size = 24*1024;
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WARN_ON(!mutex_is_locked(&dev->struct_mutex));
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pcbr = I915_READ(VLV_PCBR);
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if (pcbr) {
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/* BIOS set it up already, grab the pre-alloc'd space */
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@ -3542,8 +3544,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
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I915_WRITE(GTFIFODBG, gtfifodbg);
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}
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valleyview_setup_pctx(dev);
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/* If VLV, Forcewake all wells, else re-direct to regular path */
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gen6_gt_force_wake_get(dev_priv, FORCEWAKE_ALL);
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@ -4395,6 +4395,8 @@ void intel_enable_gt_powersave(struct drm_device *dev)
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ironlake_enable_rc6(dev);
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intel_init_emon(dev);
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} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
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if (IS_VALLEYVIEW(dev))
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valleyview_setup_pctx(dev);
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/*
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* PCU communication is slow and this doesn't need to be
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* done at any specific time, so do this out of our fast path
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