serial: imx: Fix handling of TC irq in combination with DMA
When using RS485 half duplex the Transmitter Complete irq is needed to determine the moment when the transmitter can be disabled. When using DMA this irq must only be enabled when DMA has completed to transfer all data. Otherwise the CPU might busily trigger this irq which is not properly handled and so the also pending irq for the DMA transfer cannot trigger. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -575,6 +575,11 @@ static void dma_tx_callback(void *data)
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if (!uart_circ_empty(xmit) && !uart_tx_stopped(&sport->port))
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imx_dma_tx(sport);
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else if (sport->port.rs485.flags & SER_RS485_ENABLED) {
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u32 ucr4 = imx_uart_readl(sport, UCR4);
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ucr4 |= UCR4_TCEN;
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imx_uart_writel(sport, ucr4, UCR4);
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}
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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@ -587,12 +592,16 @@ static void imx_dma_tx(struct imx_port *sport)
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struct dma_async_tx_descriptor *desc;
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struct dma_chan *chan = sport->dma_chan_tx;
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struct device *dev = sport->port.dev;
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u32 ucr1;
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u32 ucr1, ucr4;
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int ret;
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if (sport->dma_is_txing)
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return;
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ucr4 = imx_uart_readl(sport, UCR4);
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ucr4 &= ~UCR4_TCEN;
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imx_uart_writel(sport, ucr4, UCR4);
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sport->tx_bytes = uart_circ_chars_pending(xmit);
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if (xmit->tail < xmit->head) {
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@ -643,7 +652,7 @@ static void imx_start_tx(struct uart_port *port)
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u32 ucr1;
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if (port->rs485.flags & SER_RS485_ENABLED) {
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u32 ucr2, ucr4;
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u32 ucr2;
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ucr2 = imx_uart_readl(sport, UCR2);
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if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
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@ -655,10 +664,15 @@ static void imx_start_tx(struct uart_port *port)
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if (!(port->rs485.flags & SER_RS485_RX_DURING_TX))
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imx_stop_rx(port);
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/* enable transmitter and shifter empty irq */
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ucr4 = imx_uart_readl(sport, UCR4);
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ucr4 |= UCR4_TCEN;
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imx_uart_writel(sport, ucr4, UCR4);
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/*
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* Enable transmitter and shifter empty irq only if DMA is off.
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* In the DMA case this is done in the tx-callback.
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*/
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if (!sport->dma_is_enabled) {
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u32 ucr4 = imx_uart_readl(sport, UCR4);
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ucr4 |= UCR4_TCEN;
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imx_uart_writel(sport, ucr4, UCR4);
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}
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}
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if (!sport->dma_is_enabled) {
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