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drm/amdgpu: add support for VCE 3.x on Fiji

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VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2015-07-27 14:24:14 -04:00
parent 974ee3db0f
commit 188a9bcd6c
3 changed files with 19 additions and 0 deletions
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5
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
View File

@ -48,6 +48,7 @@
#endif
#define FIRMWARE_TONGA "amdgpu/tonga_vce.bin"
#define FIRMWARE_CARRIZO "amdgpu/carrizo_vce.bin"
#define FIRMWARE_FIJI "amdgpu/fiji_vce.bin"
#ifdef CONFIG_DRM_AMDGPU_CIK
MODULE_FIRMWARE(FIRMWARE_BONAIRE);
@ -58,6 +59,7 @@ MODULE_FIRMWARE(FIRMWARE_MULLINS);
#endif
MODULE_FIRMWARE(FIRMWARE_TONGA);
MODULE_FIRMWARE(FIRMWARE_CARRIZO);
MODULE_FIRMWARE(FIRMWARE_FIJI);
static void amdgpu_vce_idle_work_handler(struct work_struct *work);
@ -101,6 +103,9 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
case CHIP_CARRIZO:
fw_name = FIRMWARE_CARRIZO;
break;
case CHIP_FIJI:
fw_name = FIRMWARE_FIJI;
break;
default:
return -EINVAL;

7
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
View File

@ -205,6 +205,13 @@ static unsigned vce_v3_0_get_harvest_config(struct amdgpu_device *adev)
u32 tmp;
unsigned ret;
/* Fiji is single pipe */
if (adev->asic_type == CHIP_FIJI) {
ret = AMDGPU_VCE_HARVEST_VCE1;
return ret;
}
/* Tonga and CZ are dual or single pipe */
if (adev->flags & AMD_IS_APU)
tmp = (RREG32_SMC(ixVCE_HARVEST_FUSE_MACRO__ADDRESS) &
VCE_HARVEST_FUSE_MACRO__MASK) >>

7
drivers/gpu/drm/amd/amdgpu/vi.c
View File

@ -1223,6 +1223,13 @@ static const struct amdgpu_ip_block_version fiji_ip_blocks[] =
.rev = 0,
.funcs = &uvd_v6_0_ip_funcs,
},
{
.type = AMD_IP_BLOCK_TYPE_VCE,
.major = 3,
.minor = 0,
.rev = 0,
.funcs = &vce_v3_0_ip_funcs,
},
};
static const struct amdgpu_ip_block_version cz_ip_blocks[] =