iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: dts: Add DT node for the VIPNano-QI on the A311D

Browse Source 
This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
with it with just a few small changes.

v2: Add reference to RESET_NNA (Neil)
v3: Fix indentation (Neil)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20221202115223.39051-5-tomeu.vizoso@collabora.com
[narmstrong: squash patch 8, disable NPU by default and do not enable NPU on vim3 yet]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Tomeu Vizoso 2022-12-02 12:52:16 +01:00 committed by Neil Armstrong
parent 52b94e479e
commit 18b542e544
3 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@ -2490,4 +2490,14 @@
#clock-cells = <0>;
};
npu: npu@ff100000 {
compatible = "vivante,gc";
reg = <0x0 0xff100000 0x0 0x20000>;
interrupts = <0 147 4>;
clocks = <&clkc CLKID_NNA_CORE_CLK>,
<&clkc CLKID_NNA_AXI_CLK>;
clock-names = "core", "bus";
resets = <&reset RESET_NNA>;
status = "disabled";
};
};

4
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
View File

@ -144,3 +144,7 @@
&pmu {
compatible = "amlogic,g12b-ddr-pmu";
};
&npu {
power-domains = <&pwrc PWRC_G12A_NNA_ID>;
};

4
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
View File

@ -548,3 +548,7 @@
&usb {
power-domains = <&pwrc PWRC_SM1_USB_ID>;
};
&npu {
power-domains = <&pwrc PWRC_SM1_NNA_ID>;
};