[ALSA] ca0106: Add more symbol SPI register names and use them
Add more symbol name for SPI register values. Change the SPI_XXX_BIT defines from the bit number to a mask. Saves having to write (1<<SPI_XXX_BIT) all the time to convert to mask. We never end up wanting the bit number. Use all the symbol names for the SPI DAC init sequence. The sequence is exactly the same as it was before. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
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485100706b
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@ -559,38 +559,89 @@
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#define SPI_REG_MASK 0x1ff /* 16-bit SPI writes have a 7-bit address */
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#define SPI_REG_SHIFT 9 /* followed by 9 bits of data */
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#define SPI_LDA1_REG 0 /* digital attenuation */
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#define SPI_RDA1_REG 1
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#define SPI_LDA2_REG 4
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#define SPI_RDA2_REG 5
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#define SPI_LDA3_REG 6
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#define SPI_RDA3_REG 7
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#define SPI_LDA4_REG 13
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#define SPI_RDA4_REG 14
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#define SPI_MASTDA_REG 8
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#define SPI_DA_BIT_UPDATE (1<<8) /* update attenuation values */
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#define SPI_DA_BIT_0dB 0xff /* 0 dB */
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#define SPI_DA_BIT_infdB 0x00 /* inf dB attenuation (mute) */
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#define SPI_PL_REG 2
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#define SPI_PL_BIT_L_M (0<<5) /* left channel = mute */
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#define SPI_PL_BIT_L_L (1<<5) /* left channel = left */
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#define SPI_PL_BIT_L_R (2<<5) /* left channel = right */
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#define SPI_PL_BIT_L_C (3<<5) /* left channel = (L+R)/2 */
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#define SPI_PL_BIT_R_M (0<<7) /* right channel = mute */
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#define SPI_PL_BIT_R_L (1<<7) /* right channel = left */
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#define SPI_PL_BIT_R_R (2<<7) /* right channel = right */
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#define SPI_PL_BIT_R_C (3<<7) /* right channel = (L+R)/2 */
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#define SPI_IZD_REG 2
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#define SPI_IZD_BIT (1<<4) /* infinite zero detect */
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#define SPI_FMT_REG 3
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#define SPI_FMT_BIT_RJ (0<<0) /* right justified mode */
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#define SPI_FMT_BIT_LJ (1<<0) /* left justified mode */
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#define SPI_FMT_BIT_I2S (2<<0) /* I2S mode */
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#define SPI_FMT_BIT_DSP (3<<0) /* DSP Modes A or B */
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#define SPI_LRP_REG 3
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#define SPI_LRP_BIT (1<<2) /* invert LRCLK polarity */
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#define SPI_BCP_REG 3
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#define SPI_BCP_BIT (1<<3) /* invert BCLK polarity */
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#define SPI_IWL_REG 3
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#define SPI_IWL_BIT_16 (0<<4) /* 16-bit world length */
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#define SPI_IWL_BIT_20 (1<<4) /* 20-bit world length */
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#define SPI_IWL_BIT_24 (2<<4) /* 24-bit world length */
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#define SPI_IWL_BIT_32 (3<<4) /* 32-bit world length */
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#define SPI_MS_REG 10
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#define SPI_MS_BIT (1<<5) /* master mode */
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#define SPI_RATE_REG 10 /* only applies in master mode */
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#define SPI_RATE_BIT_128 (0<<6) /* MCLK = LRCLK * 128 */
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#define SPI_RATE_BIT_192 (1<<6)
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#define SPI_RATE_BIT_256 (2<<6)
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#define SPI_RATE_BIT_384 (3<<6)
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#define SPI_RATE_BIT_512 (4<<6)
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#define SPI_RATE_BIT_768 (5<<6)
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/* They really do label the bit for the 4th channel "4" and not "3" */
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#define SPI_DMUTE0_REG 9
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#define SPI_DMUTE1_REG 9
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#define SPI_DMUTE2_REG 9
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#define SPI_DMUTE4_REG 15
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#define SPI_DMUTE0_BIT 3
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#define SPI_DMUTE1_BIT 4
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#define SPI_DMUTE2_BIT 5
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#define SPI_DMUTE4_BIT 2
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#define SPI_DMUTE0_BIT (1<<3)
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#define SPI_DMUTE1_BIT (1<<4)
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#define SPI_DMUTE2_BIT (1<<5)
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#define SPI_DMUTE4_BIT (1<<2)
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#define SPI_PHASE0_REG 3
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#define SPI_PHASE1_REG 3
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#define SPI_PHASE2_REG 3
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#define SPI_PHASE4_REG 15
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#define SPI_PHASE0_BIT 6
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#define SPI_PHASE1_BIT 7
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#define SPI_PHASE2_BIT 8
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#define SPI_PHASE4_BIT 3
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#define SPI_PHASE0_BIT (1<<6)
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#define SPI_PHASE1_BIT (1<<7)
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#define SPI_PHASE2_BIT (1<<8)
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#define SPI_PHASE4_BIT (1<<3)
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#define SPI_PDWN_REG 2 /* power down all DACs */
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#define SPI_PDWN_BIT 2
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#define SPI_PDWN_BIT (1<<2)
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#define SPI_DACD0_REG 10 /* power down individual DACs */
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#define SPI_DACD1_REG 10
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#define SPI_DACD2_REG 10
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#define SPI_DACD4_REG 15
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#define SPI_DACD0_BIT 1
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#define SPI_DACD1_BIT 2
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#define SPI_DACD2_BIT 3
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#define SPI_DACD4_BIT 0 /* datasheet error says it's 1 */
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#define SPI_DACD0_BIT (1<<1)
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#define SPI_DACD1_BIT (1<<2)
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#define SPI_DACD2_BIT (1<<3)
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#define SPI_DACD4_BIT (1<<0) /* datasheet error says it's 1 */
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#define SPI_PWRDNALL_REG 10 /* power down everything */
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#define SPI_PWRDNALL_BIT 4
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#define SPI_PWRDNALL_BIT (1<<4)
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#include "ca_midi.h"
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@ -467,10 +467,10 @@ static const int spi_dacd_reg[] = {
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[PCM_UNKNOWN_CHANNEL] = SPI_DACD1_REG,
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};
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static const int spi_dacd_bit[] = {
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[PCM_FRONT_CHANNEL] = 1<<SPI_DACD4_BIT,
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[PCM_REAR_CHANNEL] = 1<<SPI_DACD0_BIT,
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[PCM_CENTER_LFE_CHANNEL]= 1<<SPI_DACD2_BIT,
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[PCM_UNKNOWN_CHANNEL] = 1<<SPI_DACD1_BIT,
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[PCM_FRONT_CHANNEL] = SPI_DACD4_BIT,
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[PCM_REAR_CHANNEL] = SPI_DACD0_BIT,
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[PCM_CENTER_LFE_CHANNEL]= SPI_DACD2_BIT,
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[PCM_UNKNOWN_CHANNEL] = SPI_DACD1_BIT,
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};
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/* open_playback callback */
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@ -1258,28 +1258,29 @@ static int __devinit snd_ca0106_pcm(struct snd_ca0106 *emu, int device, struct s
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return 0;
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}
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#define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
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static unsigned int spi_dac_init[] = {
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0x00ff,
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0x02ff,
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0x0400,
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0x0520,
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0x0620, /* Set 24 bit. Was 0x0600 */
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0x08ff,
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0x0aff,
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0x0cff,
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0x0eff,
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0x10ff,
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0x1200,
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0x1400,
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0x1480,
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0x1800,
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0x1aff,
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0x1cff,
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0x1e00,
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0x0530,
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0x0602,
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0x0622,
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0x140e,
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SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
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SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
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SPI_REG(SPI_PL_REG, 0x00),
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SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R),
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SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_RJ | SPI_IWL_BIT_24),
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SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
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SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
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SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
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SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
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SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
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SPI_REG(9, 0x00),
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SPI_REG(SPI_MS_REG, 0x00),
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SPI_REG(SPI_MS_REG, SPI_RATE_BIT_256),
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SPI_REG(12, 0x00),
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SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
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SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB),
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SPI_REG(15, 0x00),
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SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
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SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S),
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SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
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SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
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};
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static unsigned int i2c_adc_init[][2] = {
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@ -599,7 +599,7 @@ static struct snd_kcontrol_new snd_ca0106_volume_i2c_adc_ctls[] __devinitdata =
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.info = spi_mute_info, \
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.get = spi_mute_get, \
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.put = spi_mute_put, \
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.private_value = (reg<<SPI_REG_SHIFT) | (1<<bit) \
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.private_value = (reg<<SPI_REG_SHIFT) | (bit) \
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}
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static struct snd_kcontrol_new snd_ca0106_volume_spi_dac_ctls[]
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