net/mlx5: E-switch, enlarge peer miss group table
There is an implicit assumption that peer miss group table require to handle only a single peer. Also, there is an assumption that total_vports of the master is greater or equal to the total_vports of each peer. Change the code to support peer miss group for more than one peer. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Mark Bloch <mbloch@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -1573,6 +1573,7 @@ esw_create_peer_esw_miss_group(struct mlx5_eswitch *esw,
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u32 *flow_group_in,
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int *ix)
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{
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int max_peer_ports = (esw->total_vports - 1) * (MLX5_MAX_PORTS - 1);
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int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
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struct mlx5_flow_group *g;
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void *match_criteria;
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@ -1599,8 +1600,8 @@ esw_create_peer_esw_miss_group(struct mlx5_eswitch *esw,
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MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, *ix);
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MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index,
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*ix + esw->total_vports - 1);
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*ix += esw->total_vports;
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*ix + max_peer_ports);
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*ix += max_peer_ports + 1;
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g = mlx5_create_flow_group(fdb, flow_group_in);
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if (IS_ERR(g)) {
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@ -1702,7 +1703,7 @@ static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw)
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* total vports of the peer (currently is also uses esw->total_vports).
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*/
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table_size = MLX5_MAX_PORTS * (esw->total_vports * MAX_SQ_NVPORTS + MAX_PF_SQ) +
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esw->total_vports * 2 + MLX5_ESW_MISS_FLOWS;
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esw->total_vports * MLX5_MAX_PORTS + MLX5_ESW_MISS_FLOWS;
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/* create the slow path fdb with encap set, so further table instances
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* can be created at run time while VFs are probed if the FW allows that.
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