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PCI/ASPM: Use 'parent' and 'child' for readability

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Other users of link->pdev and link->downstream, e.g., pcie_aspm_cap_init(),
pcie_config_aspm_l1ss(), and pcie_config_aspm_link(), use "parent" and
"child" as local names.

Do the same in aspm_calc_l1ss_info() for readability.  No functional change
intended.

Link: https://lore.kernel.org/r/20201015193039.12585-4-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2020-10-15 14:30:30 -05:00
parent 08e869ee16
commit 190cd42cc1
1 changed files with 5 additions and 4 deletions
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9
drivers/pci/pcie/aspm.c
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@ -501,6 +501,7 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link,
struct aspm_register_info *upreg,
struct aspm_register_info *dwreg)
{
struct pci_dev *child = link->downstream, *parent = link->pdev;
u32 val1, val2, scale1, scale2;
u32 t_common_mode, t_power_on, l1_2_threshold, scale, value;
@ -522,13 +523,13 @@ static void aspm_calc_l1ss_info(struct pcie_link_state *link,
val2 = (dwreg->l1ss_cap & PCI_L1SS_CAP_P_PWR_ON_VALUE) >> 19;
scale2 = (dwreg->l1ss_cap & PCI_L1SS_CAP_P_PWR_ON_SCALE) >> 16;
if (calc_l1ss_pwron(link->pdev, scale1, val1) >
calc_l1ss_pwron(link->downstream, scale2, val2)) {
if (calc_l1ss_pwron(parent, scale1, val1) >
calc_l1ss_pwron(child, scale2, val2)) {
link->l1ss.ctl2 |= scale1 | (val1 << 3);
t_power_on = calc_l1ss_pwron(link->pdev, scale1, val1);
t_power_on = calc_l1ss_pwron(parent, scale1, val1);
} else {
link->l1ss.ctl2 |= scale2 | (val2 << 3);
t_power_on = calc_l1ss_pwron(link->downstream, scale2, val2);
t_power_on = calc_l1ss_pwron(child, scale2, val2);
}
/*