drm/nouveau/bar: switch to gpuobj accessor macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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parent
45ea503161
commit
1918707556
@ -122,10 +122,12 @@ gf100_bar_ctor_vm(struct gf100_bar *bar, struct gf100_bar_vm *bar_vm,
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if (ret)
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return ret;
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nv_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
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nv_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
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nv_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
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nv_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
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nvkm_kmap(bar_vm->mem);
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nvkm_wo32(bar_vm->mem, 0x0200, lower_32_bits(bar_vm->pgd->addr));
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nvkm_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr));
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nvkm_wo32(bar_vm->mem, 0x0208, lower_32_bits(bar_len - 1));
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nvkm_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1));
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nvkm_done(bar_vm->mem);
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return 0;
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}
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@ -166,13 +166,15 @@ nv50_bar_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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nv_wo32(bar->bar3, 0x00, 0x7fc00000);
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nv_wo32(bar->bar3, 0x04, lower_32_bits(limit));
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nv_wo32(bar->bar3, 0x08, lower_32_bits(start));
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nv_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 |
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upper_32_bits(start));
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nv_wo32(bar->bar3, 0x10, 0x00000000);
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nv_wo32(bar->bar3, 0x14, 0x00000000);
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nvkm_kmap(bar->bar3);
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nvkm_wo32(bar->bar3, 0x00, 0x7fc00000);
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nvkm_wo32(bar->bar3, 0x04, lower_32_bits(limit));
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nvkm_wo32(bar->bar3, 0x08, lower_32_bits(start));
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nvkm_wo32(bar->bar3, 0x0c, upper_32_bits(limit) << 24 |
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upper_32_bits(start));
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nvkm_wo32(bar->bar3, 0x10, 0x00000000);
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nvkm_wo32(bar->bar3, 0x14, 0x00000000);
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nvkm_done(bar->bar3);
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/* BAR1 */
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start = 0x0000000000ULL;
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@ -193,13 +195,15 @@ nv50_bar_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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if (ret)
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return ret;
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nv_wo32(bar->bar1, 0x00, 0x7fc00000);
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nv_wo32(bar->bar1, 0x04, lower_32_bits(limit));
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nv_wo32(bar->bar1, 0x08, lower_32_bits(start));
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nv_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 |
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upper_32_bits(start));
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nv_wo32(bar->bar1, 0x10, 0x00000000);
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nv_wo32(bar->bar1, 0x14, 0x00000000);
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nvkm_kmap(bar->bar1);
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nvkm_wo32(bar->bar1, 0x00, 0x7fc00000);
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nvkm_wo32(bar->bar1, 0x04, lower_32_bits(limit));
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nvkm_wo32(bar->bar1, 0x08, lower_32_bits(start));
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nvkm_wo32(bar->bar1, 0x0c, upper_32_bits(limit) << 24 |
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upper_32_bits(start));
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nvkm_wo32(bar->bar1, 0x10, 0x00000000);
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nvkm_wo32(bar->bar1, 0x14, 0x00000000);
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nvkm_done(bar->bar1);
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bar->base.alloc = nvkm_bar_alloc;
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bar->base.kmap = nv50_bar_kmap;
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