drm/nouveau/dma: split user classes out from engine implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
0e29998a89
commit
19fef52d93
@ -133,7 +133,7 @@ struct nvkm_device {
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struct nvkm_engine *ce[3];
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struct nvkm_engine *cipher;
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struct nvkm_disp *disp;
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struct nvkm_dmaeng *dma;
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struct nvkm_dma *dma;
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struct nvkm_fifo *fifo;
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struct nvkm_gr *gr;
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struct nvkm_engine *ifb;
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@ -193,7 +193,7 @@ struct nvkm_device_chip {
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int (*ce[3] )(struct nvkm_device *, int idx, struct nvkm_engine **);
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int (*cipher )(struct nvkm_device *, int idx, struct nvkm_engine **);
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int (*disp )(struct nvkm_device *, int idx, struct nvkm_disp **);
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int (*dma )(struct nvkm_device *, int idx, struct nvkm_dmaeng **);
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int (*dma )(struct nvkm_device *, int idx, struct nvkm_dma **);
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int (*fifo )(struct nvkm_device *, int idx, struct nvkm_fifo **);
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int (*gr )(struct nvkm_device *, int idx, struct nvkm_gr **);
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int (*ifb )(struct nvkm_device *, int idx, struct nvkm_engine **);
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@ -1,5 +1,5 @@
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#ifndef __NVKM_DMAOBJ_H__
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#define __NVKM_DMAOBJ_H__
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#ifndef __NVKM_DMA_H__
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#define __NVKM_DMA_H__
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#include <core/engine.h>
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struct nvkm_gpuobj;
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@ -11,7 +11,7 @@ struct nvkm_dmaobj {
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u64 limit;
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};
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struct nvkm_dmaeng {
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struct nvkm_dma {
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struct nvkm_engine engine;
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/* creates a "physical" dma object from a struct nvkm_dmaobj */
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@ -6,7 +6,7 @@ include $(src)/nvkm/engine/ce/Kbuild
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include $(src)/nvkm/engine/cipher/Kbuild
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include $(src)/nvkm/engine/device/Kbuild
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include $(src)/nvkm/engine/disp/Kbuild
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include $(src)/nvkm/engine/dmaobj/Kbuild
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include $(src)/nvkm/engine/dma/Kbuild
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include $(src)/nvkm/engine/fifo/Kbuild
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include $(src)/nvkm/engine/gr/Kbuild
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include $(src)/nvkm/engine/mpeg/Kbuild
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@ -26,7 +26,7 @@
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#include <engine/ce.h>
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#include <engine/cipher.h>
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#include <engine/disp.h>
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#include <engine/dmaobj.h>
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#include <engine/dma.h>
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#include <engine/fifo.h>
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#include <engine/gr.h>
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#include <engine/mpeg.h>
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@ -30,10 +30,6 @@
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#include <subdev/fb.h>
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#include <subdev/instmem.h>
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#include <subdev/timer.h>
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#include <engine/disp.h>
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#include <engine/dmaobj.h>
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#include <engine/fifo.h>
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#include <engine/pm.h>
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#include <nvif/class.h>
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#include <nvif/unpack.h>
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@ -30,7 +30,7 @@
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#include <core/enum.h>
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#include <core/handle.h>
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#include <core/ramht.h>
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#include <engine/dmaobj.h>
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#include <engine/dma.h>
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#include <subdev/bios.h>
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#include <subdev/bios/dcb.h>
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#include <subdev/bios/disp.h>
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11
drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild
Normal file
11
drivers/gpu/drm/nouveau/nvkm/engine/dma/Kbuild
Normal file
@ -0,0 +1,11 @@
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nvkm-y += nvkm/engine/dma/base.o
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nvkm-y += nvkm/engine/dma/nv04.o
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nvkm-y += nvkm/engine/dma/nv50.o
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nvkm-y += nvkm/engine/dma/gf100.o
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nvkm-y += nvkm/engine/dma/gf110.o
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nvkm-y += nvkm/engine/dma/user.o
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nvkm-y += nvkm/engine/dma/usernv04.o
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nvkm-y += nvkm/engine/dma/usernv50.o
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nvkm-y += nvkm/engine/dma/usergf100.o
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nvkm-y += nvkm/engine/dma/usergf110.o
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110
drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c
Normal file
110
drivers/gpu/drm/nouveau/nvkm/engine/dma/base.c
Normal file
@ -0,0 +1,110 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include <core/client.h>
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#include <core/gpuobj.h>
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struct hack {
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struct nvkm_gpuobj object;
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struct nvkm_gpuobj *parent;
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};
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static void
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dtor(struct nvkm_object *object)
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{
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struct hack *hack = (void *)object;
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nvkm_gpuobj_del(&hack->parent);
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nvkm_object_destroy(&hack->object.object);
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}
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static struct nvkm_oclass
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hack = {
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.handle = NV_GPUOBJ_CLASS,
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.ofuncs = &(struct nvkm_ofuncs) {
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.dtor = dtor,
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.init = _nvkm_object_init,
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.fini = _nvkm_object_fini,
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},
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};
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static int
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nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *pargpu,
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struct nvkm_gpuobj **pgpuobj)
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{
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const struct nvkm_dma_impl *impl = (void *)
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nv_oclass(nv_object(dmaobj)->engine);
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int ret = 0;
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if (&dmaobj->base == &pargpu->object) { /* ctor bind */
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struct nvkm_object *parent = (void *)pargpu;
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struct hack *object;
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if (parent->parent->parent == &nvkm_client(parent)->object) {
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/* delayed, or no, binding */
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return 0;
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}
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pargpu = (void *)nv_pclass((void *)pargpu, NV_GPUOBJ_CLASS);
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ret = nvkm_object_create(parent, NULL, &hack, NV_GPUOBJ_CLASS, &object);
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if (ret == 0) {
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nvkm_object_ref(NULL, &parent);
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*pgpuobj = &object->object;
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ret = impl->bind(dmaobj, pargpu, &object->parent);
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if (ret)
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return ret;
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object->object.node = object->parent->node;
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object->object.addr = object->parent->addr;
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object->object.size = object->parent->size;
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return 0;
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}
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return ret;
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}
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return impl->bind(dmaobj, pargpu, pgpuobj);
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}
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int
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_nvkm_dma_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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const struct nvkm_dma_impl *impl = (void *)oclass;
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struct nvkm_dma *dmaeng;
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int ret;
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ret = nvkm_engine_create(parent, engine, oclass, true, "DMAOBJ",
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"dmaobj", &dmaeng);
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*pobject = nv_object(dmaeng);
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if (ret)
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return ret;
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nv_engine(dmaeng)->sclass = impl->sclass;
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dmaeng->bind = nvkm_dmaobj_bind;
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return 0;
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}
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38
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c
Normal file
38
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.c
Normal file
@ -0,0 +1,38 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "user.h"
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struct nvkm_oclass *
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gf100_dmaeng_oclass = &(struct nvkm_dma_impl) {
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.base.handle = NV_ENGINE(DMAOBJ, 0xc0),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = _nvkm_dma_ctor,
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.dtor = _nvkm_dma_dtor,
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.init = _nvkm_dma_init,
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.fini = _nvkm_dma_fini,
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},
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.sclass = gf100_dmaeng_sclass,
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.bind = gf100_dmaobj_bind,
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}.base;
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38
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c
Normal file
38
drivers/gpu/drm/nouveau/nvkm/engine/dma/gf110.c
Normal file
@ -0,0 +1,38 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "user.h"
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struct nvkm_oclass *
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gf110_dmaeng_oclass = &(struct nvkm_dma_impl) {
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.base.handle = NV_ENGINE(DMAOBJ, 0xd0),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = _nvkm_dma_ctor,
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.dtor = _nvkm_dma_dtor,
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.init = _nvkm_dma_init,
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.fini = _nvkm_dma_fini,
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},
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.sclass = gf110_dmaeng_sclass,
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.bind = gf110_dmaobj_bind,
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}.base;
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38
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c
Normal file
38
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.c
Normal file
@ -0,0 +1,38 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "user.h"
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struct nvkm_oclass *
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nv04_dmaeng_oclass = &(struct nvkm_dma_impl) {
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.base.handle = NV_ENGINE(DMAOBJ, 0x04),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = _nvkm_dma_ctor,
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.dtor = _nvkm_dma_dtor,
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.init = _nvkm_dma_init,
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.fini = _nvkm_dma_fini,
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},
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.sclass = nv04_dmaeng_sclass,
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.bind = nv04_dmaobj_bind,
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}.base;
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38
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c
Normal file
38
drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.c
Normal file
@ -0,0 +1,38 @@
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/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "user.h"
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struct nvkm_oclass *
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nv50_dmaeng_oclass = &(struct nvkm_dma_impl) {
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.base.handle = NV_ENGINE(DMAOBJ, 0x50),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = _nvkm_dma_ctor,
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.dtor = _nvkm_dma_dtor,
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.init = _nvkm_dma_init,
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.fini = _nvkm_dma_fini,
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},
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.sclass = nv50_dmaeng_sclass,
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.bind = nv50_dmaobj_bind,
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}.base;
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18
drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h
Normal file
18
drivers/gpu/drm/nouveau/nvkm/engine/dma/priv.h
Normal file
@ -0,0 +1,18 @@
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#ifndef __NVKM_DMA_PRIV_H__
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#define __NVKM_DMA_PRIV_H__
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#include <engine/dma.h>
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int _nvkm_dma_ctor(struct nvkm_object *, struct nvkm_object *,
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struct nvkm_oclass *, void *, u32,
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struct nvkm_object **);
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#define _nvkm_dma_dtor _nvkm_engine_dtor
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#define _nvkm_dma_init _nvkm_engine_init
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#define _nvkm_dma_fini _nvkm_engine_fini
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struct nvkm_dma_impl {
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struct nvkm_oclass base;
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struct nvkm_oclass *sclass;
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int (*bind)(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
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struct nvkm_gpuobj **);
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};
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#endif
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@ -21,79 +21,15 @@
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "user.h"
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#include <core/client.h>
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#include <core/gpuobj.h>
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#include <subdev/fb.h>
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#include <subdev/instmem.h>
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#include <nvif/class.h>
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#include <nvif/unpack.h>
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struct hack {
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struct nvkm_gpuobj object;
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struct nvkm_gpuobj *parent;
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};
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static void
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dtor(struct nvkm_object *object)
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{
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struct hack *hack = (void *)object;
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nvkm_gpuobj_del(&hack->parent);
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nvkm_object_destroy(&hack->object.object);
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}
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static struct nvkm_oclass
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hack = {
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.handle = NV_GPUOBJ_CLASS,
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.ofuncs = &(struct nvkm_ofuncs) {
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.dtor = dtor,
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.init = _nvkm_object_init,
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.fini = _nvkm_object_fini,
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},
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};
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static int
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nvkm_dmaobj_bind(struct nvkm_dmaobj *dmaobj, struct nvkm_gpuobj *pargpu,
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struct nvkm_gpuobj **pgpuobj)
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{
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const struct nvkm_dmaeng_impl *impl = (void *)
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nv_oclass(nv_object(dmaobj)->engine);
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int ret = 0;
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|
||||
if (&dmaobj->base == &pargpu->object) { /* ctor bind */
|
||||
struct nvkm_object *parent = (void *)pargpu;
|
||||
struct hack *object;
|
||||
|
||||
if (parent->parent->parent == &nvkm_client(parent)->object) {
|
||||
/* delayed, or no, binding */
|
||||
return 0;
|
||||
}
|
||||
|
||||
pargpu = (void *)nv_pclass((void *)pargpu, NV_GPUOBJ_CLASS);
|
||||
|
||||
ret = nvkm_object_create(parent, NULL, &hack, NV_GPUOBJ_CLASS, &object);
|
||||
if (ret == 0) {
|
||||
nvkm_object_ref(NULL, &parent);
|
||||
*pgpuobj = &object->object;
|
||||
|
||||
ret = impl->bind(dmaobj, pargpu, &object->parent);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
object->object.node = object->parent->node;
|
||||
object->object.addr = object->parent->addr;
|
||||
object->object.size = object->parent->size;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
return impl->bind(dmaobj, pargpu, pgpuobj);
|
||||
}
|
||||
|
||||
int
|
||||
nvkm_dmaobj_create_(struct nvkm_object *parent,
|
||||
struct nvkm_object *engine,
|
||||
@ -183,23 +119,3 @@ nvkm_dmaobj_create_(struct nvkm_object *parent,
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
_nvkm_dmaeng_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
{
|
||||
const struct nvkm_dmaeng_impl *impl = (void *)oclass;
|
||||
struct nvkm_dmaeng *dmaeng;
|
||||
int ret;
|
||||
|
||||
ret = nvkm_engine_create(parent, engine, oclass, true, "DMAOBJ",
|
||||
"dmaobj", &dmaeng);
|
||||
*pobject = nv_object(dmaeng);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
nv_engine(dmaeng)->sclass = impl->sclass;
|
||||
dmaeng->bind = nvkm_dmaobj_bind;
|
||||
return 0;
|
||||
}
|
29
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h
Normal file
29
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.h
Normal file
@ -0,0 +1,29 @@
|
||||
#ifndef __NVKM_DMA_USER_H__
|
||||
#define __NVKM_DMA_USER_H__
|
||||
#include "priv.h"
|
||||
|
||||
#define nvkm_dmaobj_create(p,e,c,pa,sa,d) \
|
||||
nvkm_dmaobj_create_((p), (e), (c), (pa), (sa), sizeof(**d), (void **)d)
|
||||
|
||||
int nvkm_dmaobj_create_(struct nvkm_object *, struct nvkm_object *,
|
||||
struct nvkm_oclass *, void **, u32 *,
|
||||
int, void **);
|
||||
#define _nvkm_dmaobj_dtor nvkm_object_destroy
|
||||
#define _nvkm_dmaobj_init _nvkm_object_init
|
||||
#define _nvkm_dmaobj_fini _nvkm_object_fini
|
||||
|
||||
extern struct nvkm_oclass nv04_dmaeng_sclass[];
|
||||
extern struct nvkm_oclass nv50_dmaeng_sclass[];
|
||||
extern struct nvkm_oclass gf100_dmaeng_sclass[];
|
||||
extern struct nvkm_oclass gf110_dmaeng_sclass[];
|
||||
|
||||
int nv04_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
|
||||
struct nvkm_gpuobj **);
|
||||
int nv50_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
|
||||
struct nvkm_gpuobj **);
|
||||
int gf100_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
|
||||
struct nvkm_gpuobj **);
|
||||
int gf110_dmaobj_bind(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
|
||||
struct nvkm_gpuobj **);
|
||||
|
||||
#endif
|
@ -21,7 +21,7 @@
|
||||
*
|
||||
* Authors: Ben Skeggs
|
||||
*/
|
||||
#include "priv.h"
|
||||
#include "user.h"
|
||||
|
||||
#include <core/client.h>
|
||||
#include <core/gpuobj.h>
|
||||
@ -36,7 +36,7 @@ struct gf100_dmaobj {
|
||||
u32 flags5;
|
||||
};
|
||||
|
||||
static int
|
||||
int
|
||||
gf100_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
|
||||
struct nvkm_gpuobj **pgpuobj)
|
||||
{
|
||||
@ -65,7 +65,7 @@ gf100_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
{
|
||||
struct nvkm_dmaeng *dmaeng = (void *)engine;
|
||||
struct nvkm_dma *dmaeng = (void *)engine;
|
||||
union {
|
||||
struct gf100_dma_v0 v0;
|
||||
} *args;
|
||||
@ -146,23 +146,10 @@ gf100_dmaobj_ofuncs = {
|
||||
.fini = _nvkm_dmaobj_fini,
|
||||
};
|
||||
|
||||
static struct nvkm_oclass
|
||||
struct nvkm_oclass
|
||||
gf100_dmaeng_sclass[] = {
|
||||
{ NV_DMA_FROM_MEMORY, &gf100_dmaobj_ofuncs },
|
||||
{ NV_DMA_TO_MEMORY, &gf100_dmaobj_ofuncs },
|
||||
{ NV_DMA_IN_MEMORY, &gf100_dmaobj_ofuncs },
|
||||
{}
|
||||
};
|
||||
|
||||
struct nvkm_oclass *
|
||||
gf100_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
|
||||
.base.handle = NV_ENGINE(DMAOBJ, 0xc0),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_dmaeng_ctor,
|
||||
.dtor = _nvkm_dmaeng_dtor,
|
||||
.init = _nvkm_dmaeng_init,
|
||||
.fini = _nvkm_dmaeng_fini,
|
||||
},
|
||||
.sclass = gf100_dmaeng_sclass,
|
||||
.bind = gf100_dmaobj_bind,
|
||||
}.base;
|
@ -21,7 +21,7 @@
|
||||
*
|
||||
* Authors: Ben Skeggs
|
||||
*/
|
||||
#include "priv.h"
|
||||
#include "user.h"
|
||||
|
||||
#include <core/client.h>
|
||||
#include <core/gpuobj.h>
|
||||
@ -35,7 +35,7 @@ struct gf110_dmaobj {
|
||||
u32 flags0;
|
||||
};
|
||||
|
||||
static int
|
||||
int
|
||||
gf110_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
|
||||
struct nvkm_gpuobj **pgpuobj)
|
||||
{
|
||||
@ -63,7 +63,7 @@ gf110_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
{
|
||||
struct nvkm_dmaeng *dmaeng = (void *)engine;
|
||||
struct nvkm_dma *dmaeng = (void *)engine;
|
||||
union {
|
||||
struct gf110_dma_v0 v0;
|
||||
} *args;
|
||||
@ -128,23 +128,10 @@ gf110_dmaobj_ofuncs = {
|
||||
.fini = _nvkm_dmaobj_fini,
|
||||
};
|
||||
|
||||
static struct nvkm_oclass
|
||||
struct nvkm_oclass
|
||||
gf110_dmaeng_sclass[] = {
|
||||
{ NV_DMA_FROM_MEMORY, &gf110_dmaobj_ofuncs },
|
||||
{ NV_DMA_TO_MEMORY, &gf110_dmaobj_ofuncs },
|
||||
{ NV_DMA_IN_MEMORY, &gf110_dmaobj_ofuncs },
|
||||
{}
|
||||
};
|
||||
|
||||
struct nvkm_oclass *
|
||||
gf110_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
|
||||
.base.handle = NV_ENGINE(DMAOBJ, 0xd0),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_dmaeng_ctor,
|
||||
.dtor = _nvkm_dmaeng_dtor,
|
||||
.init = _nvkm_dmaeng_init,
|
||||
.fini = _nvkm_dmaeng_fini,
|
||||
},
|
||||
.sclass = gf110_dmaeng_sclass,
|
||||
.bind = gf110_dmaobj_bind,
|
||||
}.base;
|
@ -21,7 +21,7 @@
|
||||
*
|
||||
* Authors: Ben Skeggs
|
||||
*/
|
||||
#include "priv.h"
|
||||
#include "user.h"
|
||||
|
||||
#include <core/gpuobj.h>
|
||||
#include <subdev/fb.h>
|
||||
@ -36,7 +36,7 @@ struct nv04_dmaobj {
|
||||
u32 flags2;
|
||||
};
|
||||
|
||||
static int
|
||||
int
|
||||
nv04_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
|
||||
struct nvkm_gpuobj **pgpuobj)
|
||||
{
|
||||
@ -76,7 +76,7 @@ nv04_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
{
|
||||
struct nvkm_dmaeng *dmaeng = (void *)engine;
|
||||
struct nvkm_dma *dmaeng = (void *)engine;
|
||||
struct nv04_mmu *mmu = nv04_mmu(engine);
|
||||
struct nv04_dmaobj *dmaobj;
|
||||
int ret;
|
||||
@ -132,23 +132,10 @@ nv04_dmaobj_ofuncs = {
|
||||
.fini = _nvkm_dmaobj_fini,
|
||||
};
|
||||
|
||||
static struct nvkm_oclass
|
||||
struct nvkm_oclass
|
||||
nv04_dmaeng_sclass[] = {
|
||||
{ NV_DMA_FROM_MEMORY, &nv04_dmaobj_ofuncs },
|
||||
{ NV_DMA_TO_MEMORY, &nv04_dmaobj_ofuncs },
|
||||
{ NV_DMA_IN_MEMORY, &nv04_dmaobj_ofuncs },
|
||||
{}
|
||||
};
|
||||
|
||||
struct nvkm_oclass *
|
||||
nv04_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
|
||||
.base.handle = NV_ENGINE(DMAOBJ, 0x04),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_dmaeng_ctor,
|
||||
.dtor = _nvkm_dmaeng_dtor,
|
||||
.init = _nvkm_dmaeng_init,
|
||||
.fini = _nvkm_dmaeng_fini,
|
||||
},
|
||||
.sclass = nv04_dmaeng_sclass,
|
||||
.bind = nv04_dmaobj_bind,
|
||||
}.base;
|
@ -21,7 +21,7 @@
|
||||
*
|
||||
* Authors: Ben Skeggs
|
||||
*/
|
||||
#include "priv.h"
|
||||
#include "user.h"
|
||||
|
||||
#include <core/client.h>
|
||||
#include <core/gpuobj.h>
|
||||
@ -36,7 +36,7 @@ struct nv50_dmaobj {
|
||||
u32 flags5;
|
||||
};
|
||||
|
||||
static int
|
||||
int
|
||||
nv50_dmaobj_bind(struct nvkm_dmaobj *obj, struct nvkm_gpuobj *parent,
|
||||
struct nvkm_gpuobj **pgpuobj)
|
||||
{
|
||||
@ -65,7 +65,7 @@ nv50_dmaobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
{
|
||||
struct nvkm_dmaeng *dmaeng = (void *)engine;
|
||||
struct nvkm_dma *dmaeng = (void *)engine;
|
||||
union {
|
||||
struct nv50_dma_v0 v0;
|
||||
} *args;
|
||||
@ -152,23 +152,10 @@ nv50_dmaobj_ofuncs = {
|
||||
.fini = _nvkm_dmaobj_fini,
|
||||
};
|
||||
|
||||
static struct nvkm_oclass
|
||||
struct nvkm_oclass
|
||||
nv50_dmaeng_sclass[] = {
|
||||
{ NV_DMA_FROM_MEMORY, &nv50_dmaobj_ofuncs },
|
||||
{ NV_DMA_TO_MEMORY, &nv50_dmaobj_ofuncs },
|
||||
{ NV_DMA_IN_MEMORY, &nv50_dmaobj_ofuncs },
|
||||
{}
|
||||
};
|
||||
|
||||
struct nvkm_oclass *
|
||||
nv50_dmaeng_oclass = &(struct nvkm_dmaeng_impl) {
|
||||
.base.handle = NV_ENGINE(DMAOBJ, 0x50),
|
||||
.base.ofuncs = &(struct nvkm_ofuncs) {
|
||||
.ctor = _nvkm_dmaeng_ctor,
|
||||
.dtor = _nvkm_dmaeng_dtor,
|
||||
.init = _nvkm_dmaeng_init,
|
||||
.fini = _nvkm_dmaeng_fini,
|
||||
},
|
||||
.sclass = nv50_dmaeng_sclass,
|
||||
.bind = nv50_dmaobj_bind,
|
||||
}.base;
|
@ -1,5 +0,0 @@
|
||||
nvkm-y += nvkm/engine/dmaobj/base.o
|
||||
nvkm-y += nvkm/engine/dmaobj/nv04.o
|
||||
nvkm-y += nvkm/engine/dmaobj/nv50.o
|
||||
nvkm-y += nvkm/engine/dmaobj/gf100.o
|
||||
nvkm-y += nvkm/engine/dmaobj/gf110.o
|
@ -1,28 +0,0 @@
|
||||
#ifndef __NVKM_DMAOBJ_PRIV_H__
|
||||
#define __NVKM_DMAOBJ_PRIV_H__
|
||||
#include <engine/dmaobj.h>
|
||||
|
||||
#define nvkm_dmaobj_create(p,e,c,pa,sa,d) \
|
||||
nvkm_dmaobj_create_((p), (e), (c), (pa), (sa), sizeof(**d), (void **)d)
|
||||
|
||||
int nvkm_dmaobj_create_(struct nvkm_object *, struct nvkm_object *,
|
||||
struct nvkm_oclass *, void **, u32 *,
|
||||
int, void **);
|
||||
#define _nvkm_dmaobj_dtor nvkm_object_destroy
|
||||
#define _nvkm_dmaobj_init _nvkm_object_init
|
||||
#define _nvkm_dmaobj_fini _nvkm_object_fini
|
||||
|
||||
int _nvkm_dmaeng_ctor(struct nvkm_object *, struct nvkm_object *,
|
||||
struct nvkm_oclass *, void *, u32,
|
||||
struct nvkm_object **);
|
||||
#define _nvkm_dmaeng_dtor _nvkm_engine_dtor
|
||||
#define _nvkm_dmaeng_init _nvkm_engine_init
|
||||
#define _nvkm_dmaeng_fini _nvkm_engine_fini
|
||||
|
||||
struct nvkm_dmaeng_impl {
|
||||
struct nvkm_oclass base;
|
||||
struct nvkm_oclass *sclass;
|
||||
int (*bind)(struct nvkm_dmaobj *, struct nvkm_gpuobj *,
|
||||
struct nvkm_gpuobj **);
|
||||
};
|
||||
#endif
|
@ -26,7 +26,7 @@
|
||||
#include <core/client.h>
|
||||
#include <core/handle.h>
|
||||
#include <core/notify.h>
|
||||
#include <engine/dmaobj.h>
|
||||
#include <engine/dma.h>
|
||||
|
||||
#include <nvif/class.h>
|
||||
#include <nvif/event.h>
|
||||
@ -104,7 +104,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
|
||||
struct nvkm_fifo *fifo = (void *)engine;
|
||||
struct nvkm_fifo_base *base = (void *)parent;
|
||||
struct nvkm_fifo_chan *chan;
|
||||
struct nvkm_dmaeng *dmaeng;
|
||||
struct nvkm_dma *dma;
|
||||
struct nvkm_subdev *subdev = &fifo->engine.subdev;
|
||||
struct nvkm_device *device = subdev->device;
|
||||
unsigned long flags;
|
||||
@ -124,7 +124,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
|
||||
return -ENOENT;
|
||||
dmaobj = (void *)handle->object;
|
||||
|
||||
dmaeng = (void *)dmaobj->base.engine;
|
||||
dma = (void *)dmaobj->base.engine;
|
||||
switch (dmaobj->base.oclass->handle) {
|
||||
case NV_DMA_FROM_MEMORY:
|
||||
case NV_DMA_IN_MEMORY:
|
||||
@ -133,7 +133,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = dmaeng->bind(dmaobj, &base->gpuobj, &chan->pushgpu);
|
||||
ret = dma->bind(dmaobj, &base->gpuobj, &chan->pushgpu);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user