dt-bindings: display: bridge: Add binding for R-Car MIPI DSI/CSI-2 TX
The R-Car MIPI DSI/CSI-2 TX is embedded in the Renesas R-Car V3U SoC. It can operate in either DSI or CSI-2 mode, with up to four data lanes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car MIPI DSI/CSI-2 Encoder
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maintainers:
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- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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description: |
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This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
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R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up
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to four data lanes.
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properties:
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compatible:
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enum:
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- renesas,r8a779a0-dsi-csi2-tx # for V3U
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reg:
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maxItems: 1
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clocks:
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items:
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- description: Functional clock
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- description: DSI (and CSI-2) functional clock
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- description: PLL reference clock
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clock-names:
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items:
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- const: fck
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- const: dsi
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- const: pll
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Parallel input port
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: DSI/CSI-2 output port
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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required:
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- data-lanes
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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- resets
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
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#include <dt-bindings/power/r8a779a0-sysc.h>
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dsi0: dsi-encoder@fed80000 {
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compatible = "renesas,r8a779a0-dsi-csi2-tx";
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reg = <0xfed80000 0x10000>;
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power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
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clocks = <&cpg CPG_MOD 415>,
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<&cpg CPG_CORE R8A779A0_CLK_DSI>,
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<&cpg CPG_CORE R8A779A0_CLK_CP>;
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clock-names = "fck", "dsi", "pll";
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resets = <&cpg 415>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi0_in: endpoint {
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remote-endpoint = <&du_out_dsi0>;
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};
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};
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port@1 {
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reg = <1>;
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dsi0_out: endpoint {
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data-lanes = <1 2>;
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remote-endpoint = <&sn65dsi86_in>;
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};
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};
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};
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};
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...
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@ -6413,6 +6413,7 @@ L: dri-devel@lists.freedesktop.org
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L: linux-renesas-soc@vger.kernel.org
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S: Supported
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T: git git://linuxtv.org/pinchartl/media drm/du/next
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F: Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml
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F: Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml
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F: Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml
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F: Documentation/devicetree/bindings/display/renesas,du.yaml
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