Revert "USB: Add Intel Langwell USB OTG Transceiver Drive"
This reverts commit 453f775588.
The driver should not have been accepted as the MSRT code is not
in the main kernel yet, which this depends on.
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Hao Wu <hao.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman
parent
e3a3174519
commit
1a74826fa1
@ -59,18 +59,4 @@ config NOP_USB_XCEIV
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built-in with usb ip or which are autonomous and doesn't require any
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phy programming such as ISP1x04 etc.
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config USB_LANGWELL_OTG
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tristate "Intel Langwell USB OTG dual-role support"
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depends on USB && MRST
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select USB_OTG
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select USB_OTG_UTILS
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help
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Say Y here if you want to build Intel Langwell USB OTG
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transciever driver in kernel. This driver implements role
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switch between EHCI host driver and Langwell USB OTG
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client driver.
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To compile this driver as a module, choose M here: the
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module will be called langwell_otg.
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endif # USB || OTG
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@ -9,7 +9,6 @@ obj-$(CONFIG_USB_OTG_UTILS) += otg.o
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obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
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obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
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obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
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obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o
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obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
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ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG
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File diff suppressed because it is too large
Load Diff
@ -1,177 +0,0 @@
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/*
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* Intel Langwell USB OTG transceiver driver
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* Copyright (C) 2008, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#ifndef __LANGWELL_OTG_H__
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#define __LANGWELL_OTG_H__
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/* notify transceiver driver about OTG events */
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extern void langwell_update_transceiver(void);
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/* HCD register bus driver */
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extern int langwell_register_host(struct pci_driver *host_driver);
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/* HCD unregister bus driver */
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extern void langwell_unregister_host(struct pci_driver *host_driver);
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/* DCD register bus driver */
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extern int langwell_register_peripheral(struct pci_driver *client_driver);
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/* DCD unregister bus driver */
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extern void langwell_unregister_peripheral(struct pci_driver *client_driver);
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/* No silent failure, output warning message */
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extern void langwell_otg_nsf_msg(unsigned long message);
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#define CI_USBCMD 0x30
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# define USBCMD_RST BIT(1)
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# define USBCMD_RS BIT(0)
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#define CI_USBSTS 0x34
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# define USBSTS_SLI BIT(8)
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# define USBSTS_URI BIT(6)
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# define USBSTS_PCI BIT(2)
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#define CI_PORTSC1 0x74
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# define PORTSC_PP BIT(12)
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# define PORTSC_LS (BIT(11) | BIT(10))
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# define PORTSC_SUSP BIT(7)
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# define PORTSC_CCS BIT(0)
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#define CI_HOSTPC1 0xb4
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# define HOSTPC1_PHCD BIT(22)
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#define CI_OTGSC 0xf4
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# define OTGSC_DPIE BIT(30)
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# define OTGSC_1MSE BIT(29)
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# define OTGSC_BSEIE BIT(28)
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# define OTGSC_BSVIE BIT(27)
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# define OTGSC_ASVIE BIT(26)
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# define OTGSC_AVVIE BIT(25)
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# define OTGSC_IDIE BIT(24)
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# define OTGSC_DPIS BIT(22)
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# define OTGSC_1MSS BIT(21)
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# define OTGSC_BSEIS BIT(20)
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# define OTGSC_BSVIS BIT(19)
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# define OTGSC_ASVIS BIT(18)
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# define OTGSC_AVVIS BIT(17)
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# define OTGSC_IDIS BIT(16)
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# define OTGSC_DPS BIT(14)
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# define OTGSC_1MST BIT(13)
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# define OTGSC_BSE BIT(12)
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# define OTGSC_BSV BIT(11)
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# define OTGSC_ASV BIT(10)
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# define OTGSC_AVV BIT(9)
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# define OTGSC_ID BIT(8)
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# define OTGSC_HABA BIT(7)
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# define OTGSC_HADP BIT(6)
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# define OTGSC_IDPU BIT(5)
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# define OTGSC_DP BIT(4)
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# define OTGSC_OT BIT(3)
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# define OTGSC_HAAR BIT(2)
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# define OTGSC_VC BIT(1)
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# define OTGSC_VD BIT(0)
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# define OTGSC_INTEN_MASK (0x7f << 24)
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# define OTGSC_INTSTS_MASK (0x7f << 16)
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#define CI_USBMODE 0xf8
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# define USBMODE_CM (BIT(1) | BIT(0))
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# define USBMODE_IDLE 0
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# define USBMODE_DEVICE 0x2
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# define USBMODE_HOST 0x3
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#define INTR_DUMMY_MASK (USBSTS_SLI | USBSTS_URI | USBSTS_PCI)
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struct otg_hsm {
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/* Input */
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int a_bus_resume;
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int a_bus_suspend;
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int a_conn;
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int a_sess_vld;
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int a_srp_det;
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int a_vbus_vld;
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int b_bus_resume;
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int b_bus_suspend;
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int b_conn;
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int b_se0_srp;
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int b_sess_end;
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int b_sess_vld;
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int id;
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/* Internal variables */
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int a_set_b_hnp_en;
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int b_srp_done;
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int b_hnp_enable;
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/* Timeout indicator for timers */
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int a_wait_vrise_tmout;
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int a_wait_bcon_tmout;
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int a_aidl_bdis_tmout;
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int b_ase0_brst_tmout;
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int b_bus_suspend_tmout;
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int b_srp_res_tmout;
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/* Informative variables */
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int a_bus_drop;
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int a_bus_req;
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int a_clr_err;
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int a_suspend_req;
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int b_bus_req;
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/* Output */
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int drv_vbus;
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int loc_conn;
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int loc_sof;
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/* Others */
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int b_bus_suspend_vld;
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};
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#define TA_WAIT_VRISE 100
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#define TA_WAIT_BCON 30000
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#define TA_AIDL_BDIS 15000
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#define TB_ASE0_BRST 5000
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#define TB_SE0_SRP 2
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#define TB_SRP_RES 100
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#define TB_BUS_SUSPEND 500
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struct langwell_otg_timer {
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unsigned long expires; /* Number of count increase to timeout */
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unsigned long count; /* Tick counter */
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void (*function)(unsigned long); /* Timeout function */
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unsigned long data; /* Data passed to function */
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struct list_head list;
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};
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struct langwell_otg {
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struct otg_transceiver otg;
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struct otg_hsm hsm;
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void __iomem *regs;
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unsigned region;
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struct pci_driver *host_ops;
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struct pci_driver *client_ops;
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struct pci_dev *pdev;
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struct work_struct work;
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struct workqueue_struct *qwork;
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spinlock_t lock;
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spinlock_t wq_lock;
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};
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static inline struct langwell_otg *otg_to_langwell(struct otg_transceiver *otg)
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{
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return container_of(otg, struct langwell_otg, otg);
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}
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#ifdef DEBUG
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#define otg_dbg(fmt, args...) \
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printk(KERN_DEBUG fmt , ## args)
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#else
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#define otg_dbg(fmt, args...) \
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do { } while (0)
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#endif /* DEBUG */
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#endif /* __LANGWELL_OTG_H__ */
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