net: hns3: refactor dump reset info of debugfs
Currently, the debugfs command for reset info is implemented by "echo xxxx > cmd", and record the information in dmesg. It's unnecessary and heavy. To improve it, create a single file "reset_info" for it, and query it by command "cat reset_info", return the result to userspace, rather than record in dmesg. The display style is below: $cat reset_info PF reset count: 0 FLR reset count: 0 GLOBAL reset count: 0 IMP reset count: 0 reset done count: 0 HW reset done count: 0 reset count: 0 reset fail count: 0 vector0 interrupt enable status: 0x1 reset interrupt source: 0x0 reset interrupt status: 0x0 RAS interrupt status:0x0 hardware reset status: 0x0 handshake status: 0x80 function reset status: 0x0 Change to the "hclge_show_rst_info" in the "hclge_reset_err_handle", when the reset fails, display reset info immediately. Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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9149ca0f11
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1a7ff8280b
@ -262,6 +262,7 @@ enum hnae3_dbg_cmd {
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HNAE3_DBG_CMD_MNG_TBL,
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HNAE3_DBG_CMD_LOOPBACK,
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HNAE3_DBG_CMD_INTERRUPT_INFO,
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HNAE3_DBG_CMD_RESET_INFO,
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HNAE3_DBG_CMD_UNKNOWN,
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};
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@ -111,6 +111,13 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = {
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.buf_len = HNS3_DBG_READ_LEN,
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.init = hns3_dbg_common_file_init,
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},
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{
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.name = "reset_info",
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.cmd = HNAE3_DBG_CMD_RESET_INFO,
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.dentry = HNS3_DBG_DENTRY_COMMON,
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.buf_len = HNS3_DBG_READ_LEN,
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.init = hns3_dbg_common_file_init,
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},
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};
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static struct hns3_dbg_cap_info hns3_dbg_cap[] = {
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@ -505,7 +512,6 @@ static void hns3_dbg_help(struct hnae3_handle *h)
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dev_info(&h->pdev->dev, "dump qos pause cfg\n");
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dev_info(&h->pdev->dev, "dump qos pri map\n");
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dev_info(&h->pdev->dev, "dump qos buf cfg\n");
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dev_info(&h->pdev->dev, "dump reset info\n");
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dev_info(&h->pdev->dev, "dump m7 info\n");
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dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
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dev_info(&h->pdev->dev, "dump mac tnl status\n");
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@ -4,6 +4,7 @@
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#include <linux/device.h>
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#include "hclge_debugfs.h"
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#include "hclge_err.h"
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#include "hclge_main.h"
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#include "hclge_tm.h"
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#include "hnae3.h"
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@ -1389,37 +1390,46 @@ static void hclge_dbg_fd_tcam(struct hclge_dev *hdev)
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kfree(rule_locs);
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}
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void hclge_dbg_dump_rst_info(struct hclge_dev *hdev)
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int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len)
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{
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dev_info(&hdev->pdev->dev, "PF reset count: %u\n",
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hdev->rst_stats.pf_rst_cnt);
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dev_info(&hdev->pdev->dev, "FLR reset count: %u\n",
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hdev->rst_stats.flr_rst_cnt);
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dev_info(&hdev->pdev->dev, "GLOBAL reset count: %u\n",
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hdev->rst_stats.global_rst_cnt);
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dev_info(&hdev->pdev->dev, "IMP reset count: %u\n",
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hdev->rst_stats.imp_rst_cnt);
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dev_info(&hdev->pdev->dev, "reset done count: %u\n",
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hdev->rst_stats.reset_done_cnt);
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dev_info(&hdev->pdev->dev, "HW reset done count: %u\n",
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hdev->rst_stats.hw_reset_done_cnt);
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dev_info(&hdev->pdev->dev, "reset count: %u\n",
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hdev->rst_stats.reset_cnt);
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dev_info(&hdev->pdev->dev, "reset fail count: %u\n",
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hdev->rst_stats.reset_fail_cnt);
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dev_info(&hdev->pdev->dev, "vector0 interrupt enable status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE));
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dev_info(&hdev->pdev->dev, "reset interrupt source: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG));
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dev_info(&hdev->pdev->dev, "reset interrupt status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS));
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dev_info(&hdev->pdev->dev, "hardware reset status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG));
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dev_info(&hdev->pdev->dev, "handshake status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG));
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dev_info(&hdev->pdev->dev, "function reset status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING));
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dev_info(&hdev->pdev->dev, "hdev state: 0x%lx\n", hdev->state);
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int pos = 0;
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pos += scnprintf(buf + pos, len - pos, "PF reset count: %u\n",
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hdev->rst_stats.pf_rst_cnt);
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pos += scnprintf(buf + pos, len - pos, "FLR reset count: %u\n",
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hdev->rst_stats.flr_rst_cnt);
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pos += scnprintf(buf + pos, len - pos, "GLOBAL reset count: %u\n",
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hdev->rst_stats.global_rst_cnt);
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pos += scnprintf(buf + pos, len - pos, "IMP reset count: %u\n",
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hdev->rst_stats.imp_rst_cnt);
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pos += scnprintf(buf + pos, len - pos, "reset done count: %u\n",
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hdev->rst_stats.reset_done_cnt);
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pos += scnprintf(buf + pos, len - pos, "HW reset done count: %u\n",
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hdev->rst_stats.hw_reset_done_cnt);
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pos += scnprintf(buf + pos, len - pos, "reset count: %u\n",
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hdev->rst_stats.reset_cnt);
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pos += scnprintf(buf + pos, len - pos, "reset fail count: %u\n",
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hdev->rst_stats.reset_fail_cnt);
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pos += scnprintf(buf + pos, len - pos,
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"vector0 interrupt enable status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_REG_BASE));
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pos += scnprintf(buf + pos, len - pos, "reset interrupt source: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG));
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pos += scnprintf(buf + pos, len - pos, "reset interrupt status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS));
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pos += scnprintf(buf + pos, len - pos, "RAS interrupt status: 0x%x\n",
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hclge_read_dev(&hdev->hw,
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HCLGE_RAS_PF_OTHER_INT_STS_REG));
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pos += scnprintf(buf + pos, len - pos, "hardware reset status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG));
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pos += scnprintf(buf + pos, len - pos, "handshake status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_NIC_CSQ_DEPTH_REG));
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pos += scnprintf(buf + pos, len - pos, "function reset status: 0x%x\n",
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hclge_read_dev(&hdev->hw, HCLGE_FUN_RST_ING));
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pos += scnprintf(buf + pos, len - pos, "hdev state: 0x%lx\n",
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hdev->state);
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return 0;
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}
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static void hclge_dbg_dump_serv_info(struct hclge_dev *hdev)
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@ -1819,8 +1829,6 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, const char *cmd_buf)
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hclge_dbg_dump_qos_buf_cfg(hdev);
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} else if (strncmp(cmd_buf, DUMP_REG, strlen(DUMP_REG)) == 0) {
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hclge_dbg_dump_reg_cmd(hdev, &cmd_buf[sizeof(DUMP_REG)]);
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} else if (strncmp(cmd_buf, "dump reset info", 15) == 0) {
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hclge_dbg_dump_rst_info(hdev);
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} else if (strncmp(cmd_buf, "dump serv info", 14) == 0) {
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hclge_dbg_dump_serv_info(hdev);
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} else if (strncmp(cmd_buf, "dump m7 info", 12) == 0) {
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@ -1874,6 +1882,10 @@ static const struct hclge_dbg_func hclge_dbg_cmd_func[] = {
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.cmd = HNAE3_DBG_CMD_INTERRUPT_INFO,
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.dbg_dump = hclge_dbg_dump_interrupt,
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},
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{
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.cmd = HNAE3_DBG_CMD_RESET_INFO,
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.dbg_dump = hclge_dbg_dump_rst_info,
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},
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};
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int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
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@ -3936,6 +3936,21 @@ static int hclge_reset_prepare_wait(struct hclge_dev *hdev)
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return ret;
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}
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static void hclge_show_rst_info(struct hclge_dev *hdev)
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{
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char *buf;
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buf = kzalloc(HCLGE_DBG_RESET_INFO_LEN, GFP_KERNEL);
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if (!buf)
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return;
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hclge_dbg_dump_rst_info(hdev, buf, HCLGE_DBG_RESET_INFO_LEN);
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dev_info(&hdev->pdev->dev, "dump reset info:\n%s", buf);
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kfree(buf);
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}
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static bool hclge_reset_err_handle(struct hclge_dev *hdev)
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{
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#define MAX_RESET_FAIL_CNT 5
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@ -3966,7 +3981,7 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev)
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dev_err(&hdev->pdev->dev, "Reset fail!\n");
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hclge_dbg_dump_rst_info(hdev);
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hclge_show_rst_info(hdev);
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set_bit(HCLGE_STATE_RST_FAIL, &hdev->state);
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@ -148,6 +148,8 @@
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#define HCLGE_MAX_QSET_NUM 1024
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#define HCLGE_DBG_RESET_INFO_LEN 1024
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enum HLCGE_PORT_TYPE {
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HOST_PORT,
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NETWORK_PORT
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@ -1089,6 +1091,6 @@ int hclge_query_bd_num_cmd_send(struct hclge_dev *hdev,
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void hclge_report_hw_error(struct hclge_dev *hdev,
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enum hnae3_hw_error_type type);
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void hclge_inform_vf_promisc_info(struct hclge_vport *vport);
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void hclge_dbg_dump_rst_info(struct hclge_dev *hdev);
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int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len);
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int hclge_push_vf_link_status(struct hclge_vport *vport);
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#endif
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