staging:iio:adxrs450: Make transfer buffers __be32
Fixes the following sparse warnings: drivers/staging/iio/gyro/adxrs450_core.c:46:15: warning: cast to restricted __be32 drivers/staging/iio/gyro/adxrs450_core.c:62:17: warning: cast to restricted __be32 drivers/staging/iio/gyro/adxrs450_core.c:89:15: warning: cast to restricted __be32 drivers/staging/iio/gyro/adxrs450_core.c:129:17: warning: cast to restricted __be32 drivers/staging/iio/gyro/adxrs450_core.c:168:16: warning: cast to restricted __be32 Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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6a6df2d911
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1a87e4fba6
@ -4,9 +4,9 @@
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#define ADXRS450_STARTUP_DELAY 50 /* ms */
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/* The MSB for the spi commands */
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#define ADXRS450_SENSOR_DATA 0x20
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#define ADXRS450_WRITE_DATA 0x40
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#define ADXRS450_READ_DATA 0x80
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#define ADXRS450_SENSOR_DATA (0x20 << 24)
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#define ADXRS450_WRITE_DATA (0x40 << 24)
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#define ADXRS450_READ_DATA (0x80 << 24)
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#define ADXRS450_RATE1 0x00 /* Rate Registers */
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#define ADXRS450_TEMP1 0x02 /* Temperature Registers */
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@ -54,8 +54,8 @@ enum {
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struct adxrs450_state {
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struct spi_device *us;
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struct mutex buf_lock;
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u8 tx[ADXRS450_MAX_RX] ____cacheline_aligned;
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u8 rx[ADXRS450_MAX_TX];
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__be32 tx ____cacheline_aligned;
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__be32 rx;
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};
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@ -36,29 +36,28 @@ static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
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{
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struct spi_message msg;
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struct adxrs450_state *st = iio_priv(indio_dev);
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u32 tx;
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int ret;
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struct spi_transfer xfers[] = {
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{
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.tx_buf = st->tx,
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.tx_buf = &st->tx,
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.bits_per_word = 8,
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.len = 4,
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.len = sizeof(st->tx),
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.cs_change = 1,
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}, {
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.rx_buf = st->rx,
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.rx_buf = &st->rx,
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.bits_per_word = 8,
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.len = 4,
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.len = sizeof(st->rx),
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},
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};
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mutex_lock(&st->buf_lock);
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st->tx[0] = ADXRS450_READ_DATA | (reg_address >> 7);
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st->tx[1] = reg_address << 1;
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st->tx[2] = 0;
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st->tx[3] = 0;
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tx = ADXRS450_READ_DATA | (reg_address << 17);
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if (!(hweight32(be32_to_cpu(*(u32 *)st->tx)) & 1))
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st->tx[3] |= ADXRS450_P;
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if (!(hweight32(tx) & 1))
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tx |= ADXRS450_P;
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st->tx = cpu_to_be32(tx);
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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@ -69,7 +68,7 @@ static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
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goto error_ret;
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}
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*val = (be32_to_cpu(*(u32 *)st->rx) >> 5) & 0xFFFF;
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*val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
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error_ret:
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mutex_unlock(&st->buf_lock);
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@ -88,18 +87,17 @@ static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
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u16 val)
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{
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struct adxrs450_state *st = iio_priv(indio_dev);
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u32 tx;
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int ret;
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mutex_lock(&st->buf_lock);
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st->tx[0] = ADXRS450_WRITE_DATA | reg_address >> 7;
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st->tx[1] = reg_address << 1 | val >> 15;
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st->tx[2] = val >> 7;
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st->tx[3] = val << 1;
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tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
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if (!(hweight32(be32_to_cpu(*(u32 *)st->tx)) & 1))
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st->tx[3] |= ADXRS450_P;
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if (!(hweight32(tx) & 1))
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tx |= ADXRS450_P;
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ret = spi_write(st->us, st->tx, 4);
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st->tx = cpu_to_be32(tx);
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ret = spi_write(st->us, &st->tx, sizeof(st->tx));
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if (ret)
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dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
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reg_address);
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@ -120,22 +118,19 @@ static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
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int ret;
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struct spi_transfer xfers[] = {
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{
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.tx_buf = st->tx,
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.tx_buf = &st->tx,
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.bits_per_word = 8,
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.len = 4,
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.len = sizeof(st->tx),
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.cs_change = 1,
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}, {
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.rx_buf = st->rx,
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.rx_buf = &st->rx,
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.bits_per_word = 8,
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.len = 4,
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.len = sizeof(st->rx),
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},
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};
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mutex_lock(&st->buf_lock);
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st->tx[0] = ADXRS450_SENSOR_DATA;
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st->tx[1] = 0;
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st->tx[2] = 0;
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st->tx[3] = 0;
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st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
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spi_message_init(&msg);
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spi_message_add_tail(&xfers[0], &msg);
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@ -146,7 +141,7 @@ static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
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goto error_ret;
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}
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*val = (be32_to_cpu(*(u32 *)st->rx) >> 10) & 0xFFFF;
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*val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
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error_ret:
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mutex_unlock(&st->buf_lock);
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@ -163,20 +158,19 @@ static int adxrs450_spi_initial(struct adxrs450_state *st,
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{
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struct spi_message msg;
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int ret;
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u32 tx;
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struct spi_transfer xfers = {
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.tx_buf = st->tx,
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.rx_buf = st->rx,
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.tx_buf = &st->tx,
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.rx_buf = &st->rx,
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.bits_per_word = 8,
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.len = 4,
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.len = sizeof(st->tx),
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};
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mutex_lock(&st->buf_lock);
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st->tx[0] = ADXRS450_SENSOR_DATA;
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st->tx[1] = 0;
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st->tx[2] = 0;
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st->tx[3] = 0;
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tx = ADXRS450_SENSOR_DATA;
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if (chk)
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st->tx[3] |= (ADXRS450_CHK | ADXRS450_P);
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tx |= (ADXRS450_CHK | ADXRS450_P);
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st->tx = cpu_to_be32(tx);
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spi_message_init(&msg);
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spi_message_add_tail(&xfers, &msg);
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ret = spi_sync(st->us, &msg);
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@ -185,7 +179,7 @@ static int adxrs450_spi_initial(struct adxrs450_state *st,
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goto error_ret;
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}
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*val = be32_to_cpu(*(u32 *)st->rx);
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*val = be32_to_cpu(st->rx);
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error_ret:
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mutex_unlock(&st->buf_lock);
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