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ARM: dts: uniphier: Add syscon-uhs-mode to SD node

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Add sociopnext,syscon-uhs-mode prpperty to the SD node to refer the handle
of the control logic node.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-5-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Kunihiko Hayashi 2023-02-07 11:35:10 +09:00 committed by Arnd Bergmann
parent 76b2cb8a70
commit 1ae6e6bc72
No known key found for this signature in database
GPG Key ID: 9A6C79EFE60018D9
4 changed files with 8 additions and 4 deletions
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3
arch/arm/boot/dts/uniphier-pro4.dtsi
View File

@ -241,7 +241,7 @@
reg = <0x59801000 0x400>;
};
syscon@59810000 {
mioctrl: syscon@59810000 {
compatible = "socionext,uniphier-pro4-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
@ -307,6 +307,7 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
socionext,syscon-uhs-mode = <&mioctrl 0>;
};
emmc: mmc@5a500000 {

3
arch/arm/boot/dts/uniphier-pro5.dtsi
View File

@ -341,7 +341,7 @@
reg = <0x59801000 0x400>;
};
syscon@59810000 {
sdctrl: syscon@59810000 {
compatible = "socionext,uniphier-pro5-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
@ -699,6 +699,7 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
socionext,syscon-uhs-mode = <&sdctrl 0>;
};
};
};

3
arch/arm/boot/dts/uniphier-pxs2.dtsi
View File

@ -422,7 +422,7 @@
reg = <0x59801000 0x400>;
};
syscon@59810000 {
sdctrl: syscon@59810000 {
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
@ -486,6 +486,7 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
socionext,syscon-uhs-mode = <&sdctrl 0>;
};
soc_glue: syscon@5f800000 {

3
arch/arm/boot/dts/uniphier-sld8.dtsi
View File

@ -211,7 +211,7 @@
reg = <0x59801000 0x400>;
};
syscon@59810000 {
mioctrl: syscon@59810000 {
compatible = "socionext,uniphier-sld8-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
@ -276,6 +276,7 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
socionext,syscon-uhs-mode = <&mioctrl 0>;
};
emmc: mmc@5a500000 {