ARM: dts: sun8i-a83t: Add thermal sensor and thermal zones

There are three sensors, two for each CPU cluster, one for GPU.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
This commit is contained in:
Ondrej Jirman 2019-12-19 09:28:19 -08:00 committed by Maxime Ripard
parent b39f712dbe
commit 1b084d2e4e
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5

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@ -50,6 +50,7 @@
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@ -581,6 +582,12 @@
sid: eeprom@1c14000 {
compatible = "allwinner,sun8i-a83t-sid";
reg = <0x1c14000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ths_calibration: thermal-sensor-calibration@34 {
reg = <0x34 8>;
};
};
crypto: crypto@1c15000 {
@ -1165,5 +1172,34 @@
#address-cells = <1>;
#size-cells = <0>;
};
ths: thermal-sensor@1f04000 {
compatible = "allwinner,sun8i-a83t-ths";
reg = <0x01f04000 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
nvmem-cells = <&ths_calibration>;
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
};
thermal-zones {
cpu0_thermal: cpu0-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
};
cpu1_thermal: cpu1-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
};
gpu_thermal: gpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 2>;
};
};
};