[MTD] [NAND] Add support for NAND on the Socrates board
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Acked-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Wolfgang Grandegger
David Woodhouse
parent
81ec5364a5
commit
1b578193af
@ -440,4 +440,10 @@ config MTD_NAND_TXX9NDFMC
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help
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This enables the NAND flash controller on the TXx9 SoCs.
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config MTD_NAND_SOCRATES
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tristate "Support for NAND on Socrates board"
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depends on MTD_NAND && SOCRATES
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help
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Enables support for NAND Flash chips wired onto Socrates board.
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endif # MTD_NAND
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@ -37,6 +37,7 @@ obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o
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obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o
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obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o
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obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o
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obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
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obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
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nand-objs := nand_base.o nand_bbt.o
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325
drivers/mtd/nand/socrates_nand.c
Normal file
325
drivers/mtd/nand/socrates_nand.c
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@ -0,0 +1,325 @@
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/*
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* drivers/mtd/nand/socrates_nand.c
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*
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* Copyright © 2008 Ilya Yanok, Emcraft Systems
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#define FPGA_NAND_CMD_MASK (0x7 << 28)
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#define FPGA_NAND_CMD_COMMAND (0x0 << 28)
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#define FPGA_NAND_CMD_ADDR (0x1 << 28)
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#define FPGA_NAND_CMD_READ (0x2 << 28)
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#define FPGA_NAND_CMD_WRITE (0x3 << 28)
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#define FPGA_NAND_BUSY (0x1 << 15)
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#define FPGA_NAND_ENABLE (0x1 << 31)
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#define FPGA_NAND_DATA_SHIFT 16
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struct socrates_nand_host {
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struct nand_chip nand_chip;
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struct mtd_info mtd;
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void __iomem *io_base;
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struct device *dev;
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};
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/**
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* socrates_nand_write_buf - write buffer to chip
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* @mtd: MTD device structure
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* @buf: data buffer
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* @len: number of bytes to write
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*/
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static void socrates_nand_write_buf(struct mtd_info *mtd,
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const uint8_t *buf, int len)
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{
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int i;
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struct nand_chip *this = mtd->priv;
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struct socrates_nand_host *host = this->priv;
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for (i = 0; i < len; i++) {
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out_be32(host->io_base, FPGA_NAND_ENABLE |
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FPGA_NAND_CMD_WRITE |
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(buf[i] << FPGA_NAND_DATA_SHIFT));
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}
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}
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/**
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* socrates_nand_read_buf - read chip data into buffer
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* @mtd: MTD device structure
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* @buf: buffer to store date
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* @len: number of bytes to read
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*/
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static void socrates_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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{
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int i;
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struct nand_chip *this = mtd->priv;
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struct socrates_nand_host *host = this->priv;
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uint32_t val;
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val = FPGA_NAND_ENABLE | FPGA_NAND_CMD_READ;
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out_be32(host->io_base, val);
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for (i = 0; i < len; i++) {
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buf[i] = (in_be32(host->io_base) >>
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FPGA_NAND_DATA_SHIFT) & 0xff;
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}
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}
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/**
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* socrates_nand_read_byte - read one byte from the chip
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* @mtd: MTD device structure
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*/
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static uint8_t socrates_nand_read_byte(struct mtd_info *mtd)
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{
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uint8_t byte;
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socrates_nand_read_buf(mtd, &byte, sizeof(byte));
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return byte;
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}
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/**
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* socrates_nand_read_word - read one word from the chip
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* @mtd: MTD device structure
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*/
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static uint16_t socrates_nand_read_word(struct mtd_info *mtd)
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{
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uint16_t word;
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socrates_nand_read_buf(mtd, (uint8_t *)&word, sizeof(word));
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return word;
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}
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/**
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* socrates_nand_verify_buf - Verify chip data against buffer
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* @mtd: MTD device structure
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* @buf: buffer containing the data to compare
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* @len: number of bytes to compare
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*/
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static int socrates_nand_verify_buf(struct mtd_info *mtd, const u8 *buf,
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int len)
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{
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int i;
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for (i = 0; i < len; i++) {
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if (buf[i] != socrates_nand_read_byte(mtd))
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return -EFAULT;
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}
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return 0;
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}
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/*
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* Hardware specific access to control-lines
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*/
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static void socrates_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *nand_chip = mtd->priv;
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struct socrates_nand_host *host = nand_chip->priv;
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uint32_t val;
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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val = FPGA_NAND_CMD_COMMAND;
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else
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val = FPGA_NAND_CMD_ADDR;
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if (ctrl & NAND_NCE)
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val |= FPGA_NAND_ENABLE;
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val |= (cmd & 0xff) << FPGA_NAND_DATA_SHIFT;
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out_be32(host->io_base, val);
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}
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/*
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* Read the Device Ready pin.
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*/
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static int socrates_nand_device_ready(struct mtd_info *mtd)
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{
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struct nand_chip *nand_chip = mtd->priv;
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struct socrates_nand_host *host = nand_chip->priv;
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if (in_be32(host->io_base) & FPGA_NAND_BUSY)
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return 0; /* busy */
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return 1;
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}
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#ifdef CONFIG_MTD_PARTITIONS
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static const char *part_probes[] = { "cmdlinepart", NULL };
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#endif
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/*
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* Probe for the NAND device.
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*/
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static int __devinit socrates_nand_probe(struct of_device *ofdev,
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const struct of_device_id *ofid)
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{
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struct socrates_nand_host *host;
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struct mtd_info *mtd;
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struct nand_chip *nand_chip;
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int res;
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#ifdef CONFIG_MTD_PARTITIONS
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struct mtd_partition *partitions = NULL;
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int num_partitions = 0;
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#endif
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/* Allocate memory for the device structure (and zero it) */
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host = kzalloc(sizeof(struct socrates_nand_host), GFP_KERNEL);
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if (!host) {
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printk(KERN_ERR
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"socrates_nand: failed to allocate device structure.\n");
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return -ENOMEM;
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}
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host->io_base = of_iomap(ofdev->node, 0);
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if (host->io_base == NULL) {
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printk(KERN_ERR "socrates_nand: ioremap failed\n");
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kfree(host);
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return -EIO;
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}
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mtd = &host->mtd;
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nand_chip = &host->nand_chip;
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host->dev = &ofdev->dev;
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nand_chip->priv = host; /* link the private data structures */
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mtd->priv = nand_chip;
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mtd->name = "socrates_nand";
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mtd->owner = THIS_MODULE;
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mtd->dev.parent = &ofdev->dev;
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/*should never be accessed directly */
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nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
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nand_chip->IO_ADDR_W = (void *)0xdeadbeef;
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nand_chip->cmd_ctrl = socrates_nand_cmd_ctrl;
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nand_chip->read_byte = socrates_nand_read_byte;
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nand_chip->read_word = socrates_nand_read_word;
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nand_chip->write_buf = socrates_nand_write_buf;
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nand_chip->read_buf = socrates_nand_read_buf;
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nand_chip->verify_buf = socrates_nand_verify_buf;
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nand_chip->dev_ready = socrates_nand_device_ready;
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nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
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/* TODO: I have no idea what real delay is. */
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nand_chip->chip_delay = 20; /* 20us command delay time */
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dev_set_drvdata(&ofdev->dev, host);
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/* first scan to find the device and get the page size */
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if (nand_scan_ident(mtd, 1)) {
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res = -ENXIO;
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goto out;
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}
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/* second phase scan */
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if (nand_scan_tail(mtd)) {
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res = -ENXIO;
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goto out;
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}
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#ifdef CONFIG_MTD_PARTITIONS
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#ifdef CONFIG_MTD_CMDLINE_PARTS
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num_partitions = parse_mtd_partitions(mtd, part_probes,
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&partitions, 0);
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if (num_partitions < 0) {
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res = num_partitions;
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goto release;
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}
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#endif
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#ifdef CONFIG_MTD_OF_PARTS
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if (num_partitions == 0) {
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num_partitions = of_mtd_parse_partitions(&ofdev->dev,
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ofdev->node,
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&partitions);
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if (num_partitions < 0) {
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res = num_partitions;
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goto release;
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}
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}
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#endif
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if (partitions && (num_partitions > 0))
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res = add_mtd_partitions(mtd, partitions, num_partitions);
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else
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#endif
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res = add_mtd_device(mtd);
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if (!res)
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return res;
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#ifdef CONFIG_MTD_PARTITIONS
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release:
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#endif
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nand_release(mtd);
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out:
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dev_set_drvdata(&ofdev->dev, NULL);
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iounmap(host->io_base);
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kfree(host);
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return res;
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}
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/*
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* Remove a NAND device.
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*/
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static int __devexit socrates_nand_remove(struct of_device *ofdev)
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{
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struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev);
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struct mtd_info *mtd = &host->mtd;
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nand_release(mtd);
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dev_set_drvdata(&ofdev->dev, NULL);
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iounmap(host->io_base);
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kfree(host);
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return 0;
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}
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static struct of_device_id socrates_nand_match[] =
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{
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{
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.compatible = "abb,socrates-nand",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, socrates_nand_match);
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static struct of_platform_driver socrates_nand_driver = {
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.name = "socrates_nand",
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.match_table = socrates_nand_match,
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.probe = socrates_nand_probe,
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.remove = __devexit_p(socrates_nand_remove),
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};
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static int __init socrates_nand_init(void)
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{
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return of_register_platform_driver(&socrates_nand_driver);
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}
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static void __exit socrates_nand_exit(void)
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{
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of_unregister_platform_driver(&socrates_nand_driver);
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}
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module_init(socrates_nand_init);
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module_exit(socrates_nand_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Ilya Yanok");
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MODULE_DESCRIPTION("NAND driver for Socrates board");
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