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ASoC: Intel: avs: L1SEN reference counted

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Code loading is not the only procedure that manipulates L1SEN. Update
existing mechanism so the stream starting procedure can interfere with
L1SEN without causing any trouble to its other users.

Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240220115035.770402-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Cezary Rojewski 2024-02-20 12:50:26 +01:00 committed by Mark Brown
parent b401b62175
commit 1b72943ab1
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GPG Key ID: 24D68B725D5487D0
2 changed files with 9 additions and 3 deletions
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1
sound/soc/intel/avs/avs.h
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@ -127,6 +127,7 @@ struct avs_dev {
int *core_refs; /* reference count per core */
char **lib_names;
int num_lp_paths;
atomic_t l1sen_counter; /* controls whether L1SEN should be disabled */
struct completion fw_ready;
struct work_struct probe_work;

11
sound/soc/intel/avs/core.c
View File

@ -69,9 +69,14 @@ void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable)
void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable)
{
u32 value = enable ? AZX_VS_EM2_L1SEN : 0;
snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN, value);
if (enable) {
if (atomic_inc_and_test(&adev->l1sen_counter))
snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN,
AZX_VS_EM2_L1SEN);
} else {
if (atomic_dec_return(&adev->l1sen_counter) == -1)
snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN, 0);
}
}
static int avs_hdac_bus_init_streams(struct hdac_bus *bus)