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drm/amd: Load GFX9 microcode during early_init

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If GFX9 microcode is required but not available during early init, the
firmware framebuffer will have already been released and the screen will
freeze.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello 2022-12-28 01:33:35 -06:00 committed by Alex Deucher
parent ec787deb2d
commit 1c21885ec1
1 changed files with 9 additions and 49 deletions
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58
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
View File

@ -1245,7 +1245,7 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)
}
static int gfx_v9_0_init_cp_gfx_microcode(struct amdgpu_device *adev,
const char *chip_name)
char *chip_name)
{
char fw_name[30];
int err;
@ -1278,7 +1278,7 @@ out:
}
static int gfx_v9_0_init_rlc_microcode(struct amdgpu_device *adev,
const char *chip_name)
char *chip_name)
{
char fw_name[30];
int err;
@ -1333,7 +1333,7 @@ static bool gfx_v9_0_load_mec2_fw_bin_support(struct amdgpu_device *adev)
}
static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
const char *chip_name)
char *chip_name)
{
char fw_name[30];
int err;
@ -1379,58 +1379,24 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
static int gfx_v9_0_init_microcode(struct amdgpu_device *adev)
{
const char *chip_name;
char ucode_prefix[30];
int r;
DRM_DEBUG("\n");
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(9, 0, 1):
chip_name = "vega10";
break;
case IP_VERSION(9, 2, 1):
chip_name = "vega12";
break;
case IP_VERSION(9, 4, 0):
chip_name = "vega20";
break;
case IP_VERSION(9, 2, 2):
case IP_VERSION(9, 1, 0):
if (adev->apu_flags & AMD_APU_IS_RAVEN2)
chip_name = "raven2";
else if (adev->apu_flags & AMD_APU_IS_PICASSO)
chip_name = "picasso";
else
chip_name = "raven";
break;
case IP_VERSION(9, 4, 1):
chip_name = "arcturus";
break;
case IP_VERSION(9, 3, 0):
if (adev->apu_flags & AMD_APU_IS_RENOIR)
chip_name = "renoir";
else
chip_name = "green_sardine";
break;
case IP_VERSION(9, 4, 2):
chip_name = "aldebaran";
break;
default:
BUG();
}
amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
/* No CPG in Arcturus */
if (adev->gfx.num_gfx_rings) {
r = gfx_v9_0_init_cp_gfx_microcode(adev, chip_name);
r = gfx_v9_0_init_cp_gfx_microcode(adev, ucode_prefix);
if (r)
return r;
}
r = gfx_v9_0_init_rlc_microcode(adev, chip_name);
r = gfx_v9_0_init_rlc_microcode(adev, ucode_prefix);
if (r)
return r;
r = gfx_v9_0_init_cp_compute_microcode(adev, chip_name);
r = gfx_v9_0_init_cp_compute_microcode(adev, ucode_prefix);
if (r)
return r;
@ -2119,12 +2085,6 @@ static int gfx_v9_0_sw_init(void *handle)
adev->gfx.gfx_current_status = AMDGPU_GFX_NORMAL_MODE;
r = gfx_v9_0_init_microcode(adev);
if (r) {
DRM_ERROR("Failed to load gfx firmware!\n");
return r;
}
if (adev->gfx.rlc.funcs) {
if (adev->gfx.rlc.funcs->init) {
r = adev->gfx.rlc.funcs->init(adev);
@ -4566,7 +4526,7 @@ static int gfx_v9_0_early_init(void *handle)
/* init rlcg reg access ctrl */
gfx_v9_0_init_rlcg_reg_access_ctrl(adev);
return 0;
return gfx_v9_0_init_microcode(adev);
}
static int gfx_v9_0_ecc_late_init(void *handle)