media: camss: vfe-480: Multiple outputs support for SM8250
On SM8250 each VFE supports at least 3 RDI channels, or 4 in case of VFE-Lite, so add appropriate IRQ setup and handling. Signed-off-by: Milen Mitkov <quic_mmitkov@quicinc.com> Reviewed-by: Robert Foss <robert.foss@linaro.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Robert Foss <robert.foss@linaro.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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@ -94,6 +94,8 @@ static inline int bus_irq_mask_0_comp_done(struct vfe_device *vfe, int n)
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#define RDI_WM(n) ((IS_LITE ? 0 : 23) + (n))
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#define RDI_COMP_GROUP(n) ((IS_LITE ? 0 : 11) + (n))
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#define MAX_VFE_OUTPUT_LINES 4
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static u32 vfe_hw_version(struct vfe_device *vfe)
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{
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u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION);
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@ -171,12 +173,26 @@ static inline void vfe_reg_update_clear(struct vfe_device *vfe,
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static void vfe_enable_irq_common(struct vfe_device *vfe)
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{
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/* enable only the IRQs used: rup and comp_done irqs for RDI0 */
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/* enable reset ack IRQ and top BUS status IRQ */
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writel_relaxed(IRQ_MASK_0_RESET_ACK | IRQ_MASK_0_BUS_TOP_IRQ,
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vfe->base + VFE_IRQ_MASK(0));
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writel_relaxed(BUS_IRQ_MASK_0_RDI_RUP(vfe, 0) |
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BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)),
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vfe->base + VFE_BUS_IRQ_MASK(0));
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}
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static void vfe_enable_lines_irq(struct vfe_device *vfe)
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{
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int i;
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u32 bus_irq_mask = 0;
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for (i = 0; i < MAX_VFE_OUTPUT_LINES; i++) {
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/* Enable IRQ for newly added lines, but also keep already running lines's IRQ */
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if (vfe->line[i].output.state == VFE_OUTPUT_RESERVED ||
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vfe->line[i].output.state == VFE_OUTPUT_ON) {
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bus_irq_mask |= BUS_IRQ_MASK_0_RDI_RUP(vfe, i)
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| BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(i));
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}
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}
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writel_relaxed(bus_irq_mask, vfe->base + VFE_BUS_IRQ_MASK(0));
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}
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static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id);
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@ -193,6 +209,7 @@ static irqreturn_t vfe_isr(int irq, void *dev)
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{
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struct vfe_device *vfe = dev;
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u32 status;
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int i;
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status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0));
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writel_relaxed(status, vfe->base + VFE_IRQ_CLEAR(0));
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@ -207,11 +224,14 @@ static irqreturn_t vfe_isr(int irq, void *dev)
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writel_relaxed(status, vfe->base + VFE_BUS_IRQ_CLEAR(0));
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writel_relaxed(1, vfe->base + VFE_BUS_IRQ_CLEAR_GLOBAL);
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if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, 0))
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vfe_isr_reg_update(vfe, 0);
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/* Loop through all WMs IRQs */
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for (i = 0; i < MSM_VFE_IMAGE_MASTERS_NUM; i++) {
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if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, i))
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vfe_isr_reg_update(vfe, i);
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if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)))
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vfe_isr_wm_done(vfe, 0);
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if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(i)))
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vfe_isr_wm_done(vfe, i);
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}
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}
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return IRQ_HANDLED;
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@ -234,7 +254,6 @@ static int vfe_get_output(struct vfe_line *line)
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struct vfe_device *vfe = to_vfe(line);
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struct vfe_output *output;
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unsigned long flags;
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int wm_idx;
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spin_lock_irqsave(&vfe->output_lock, flags);
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@ -246,12 +265,12 @@ static int vfe_get_output(struct vfe_line *line)
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output->wm_num = 1;
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wm_idx = vfe_reserve_wm(vfe, line->id);
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if (wm_idx < 0) {
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dev_err(vfe->camss->dev, "Can not reserve wm\n");
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goto error_get_wm;
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}
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output->wm_idx[0] = wm_idx;
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/* Correspondence between VFE line number and WM number.
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* line 0 -> RDI 0, line 1 -> RDI1, line 2 -> RDI2, line 3 -> PIX/RDI3
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* Note this 1:1 mapping will not work for PIX streams.
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*/
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output->wm_idx[0] = line->id;
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vfe->wm_output_map[line->id] = line->id;
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output->drop_update_idx = 0;
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@ -259,11 +278,9 @@ static int vfe_get_output(struct vfe_line *line)
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return 0;
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error_get_wm:
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vfe_release_wm(vfe, output->wm_idx[0]);
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output->state = VFE_OUTPUT_OFF;
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error:
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spin_unlock_irqrestore(&vfe->output_lock, flags);
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output->state = VFE_OUTPUT_OFF;
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return -EINVAL;
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}
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@ -360,6 +377,8 @@ static int vfe_enable(struct vfe_line *line)
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vfe->stream_count++;
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vfe_enable_lines_irq(vfe);
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mutex_unlock(&vfe->stream_lock);
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ret = vfe_get_output(line);
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@ -566,7 +585,7 @@ static const struct camss_video_ops vfe_video_ops_480 = {
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static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)
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{
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vfe->video_ops = vfe_video_ops_480;
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vfe->line_num = 1;
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vfe->line_num = MAX_VFE_OUTPUT_LINES;
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}
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const struct vfe_hw_ops vfe_ops_480 = {
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