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drm/i915: Handle each GT on init/release and suspend/resume

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In preparation for enabling a second GT, there are a number of GT/uncore
operations that happen during initialization or suspend flows that need
to be performed on each GT, not just the primary,

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-10-matthew.d.roper@intel.com
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
This commit is contained in:
Matt Roper 2022-09-06 16:49:29 -07:00 committed by Joonas Lahtinen
parent cfb0fa4241
commit 1c66a12ab4
1 changed files with 42 additions and 17 deletions
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59
drivers/gpu/drm/i915/i915_driver.c
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@ -310,8 +310,13 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
static void sanitize_gpu(struct drm_i915_private *i915)
{
if (!INTEL_INFO(i915)->gpu_reset_clobbers_display)
__intel_gt_reset(to_gt(i915), ALL_ENGINES);
if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) {
struct intel_gt *gt;
unsigned int i;
for_each_gt(gt, i915, i)
__intel_gt_reset(gt, ALL_ENGINES);
}
}
/**
@ -715,6 +720,8 @@ static void i915_driver_hw_remove(struct drm_i915_private *dev_priv)
static void i915_driver_register(struct drm_i915_private *dev_priv)
{
struct drm_device *dev = &dev_priv->drm;
struct intel_gt *gt;
unsigned int i;
i915_gem_driver_register(dev_priv);
i915_pmu_register(dev_priv);
@ -734,7 +741,8 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
/* Depends on sysfs having been initialized */
i915_perf_register(dev_priv);
intel_gt_driver_register(to_gt(dev_priv));
for_each_gt(gt, dev_priv, i)
intel_gt_driver_register(gt);
intel_display_driver_register(dev_priv);
@ -753,6 +761,9 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
*/
static void i915_driver_unregister(struct drm_i915_private *dev_priv)
{
struct intel_gt *gt;
unsigned int i;
i915_switcheroo_unregister(dev_priv);
intel_unregister_dsm_handler();
@ -762,7 +773,8 @@ static void i915_driver_unregister(struct drm_i915_private *dev_priv)
intel_display_driver_unregister(dev_priv);
intel_gt_driver_unregister(to_gt(dev_priv));
for_each_gt(gt, dev_priv, i)
intel_gt_driver_unregister(gt);
i915_perf_unregister(dev_priv);
i915_pmu_unregister(dev_priv);
@ -784,6 +796,8 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
{
if (drm_debug_enabled(DRM_UT_DRIVER)) {
struct drm_printer p = drm_debug_printer("i915 device info:");
struct intel_gt *gt;
unsigned int i;
drm_printf(&p, "pciid=0x%04x rev=0x%02x platform=%s (subplatform=0x%x) gen=%i\n",
INTEL_DEVID(dev_priv),
@ -796,7 +810,8 @@ static void i915_welcome_messages(struct drm_i915_private *dev_priv)
intel_device_info_print_static(INTEL_INFO(dev_priv), &p);
intel_device_info_print_runtime(RUNTIME_INFO(dev_priv), &p);
i915_print_iommu_status(dev_priv, &p);
intel_gt_info_print(&to_gt(dev_priv)->info, &p);
for_each_gt(gt, dev_priv, i)
intel_gt_info_print(&gt->info, &p);
}
if (IS_ENABLED(CONFIG_DRM_I915_DEBUG))
@ -1206,13 +1221,15 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation)
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
int ret;
struct intel_gt *gt;
int ret, i;
disable_rpm_wakeref_asserts(rpm);
i915_gem_suspend_late(dev_priv);
intel_uncore_suspend(&dev_priv->uncore);
for_each_gt(gt, dev_priv, i)
intel_uncore_suspend(gt->uncore);
intel_power_domains_suspend(dev_priv,
get_suspend_mode(dev_priv, hibernation));
@ -1352,7 +1369,8 @@ static int i915_drm_resume_early(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
int ret;
struct intel_gt *gt;
int ret, i;
/*
* We have a resume ordering issue with the snd-hda driver also
@ -1408,9 +1426,10 @@ static int i915_drm_resume_early(struct drm_device *dev)
drm_err(&dev_priv->drm,
"Resume prepare failed: %d, continuing anyway\n", ret);
intel_uncore_resume_early(&dev_priv->uncore);
intel_gt_check_and_clear_faults(to_gt(dev_priv));
for_each_gt(gt, dev_priv, i) {
intel_uncore_resume_early(gt->uncore);
intel_gt_check_and_clear_faults(gt);
}
intel_display_power_resume_early(dev_priv);
@ -1591,7 +1610,8 @@ static int intel_runtime_suspend(struct device *kdev)
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
int ret;
struct intel_gt *gt;
int ret, i;
if (drm_WARN_ON_ONCE(&dev_priv->drm, !HAS_RUNTIME_PM(dev_priv)))
return -ENODEV;
@ -1606,11 +1626,13 @@ static int intel_runtime_suspend(struct device *kdev)
*/
i915_gem_runtime_suspend(dev_priv);
intel_gt_runtime_suspend(to_gt(dev_priv));
for_each_gt(gt, dev_priv, i)
intel_gt_runtime_suspend(gt);
intel_runtime_pm_disable_interrupts(dev_priv);
intel_uncore_suspend(&dev_priv->uncore);
for_each_gt(gt, dev_priv, i)
intel_uncore_suspend(gt->uncore);
intel_display_power_suspend(dev_priv);
@ -1681,7 +1703,8 @@ static int intel_runtime_resume(struct device *kdev)
struct drm_i915_private *dev_priv = kdev_to_i915(kdev);
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
int ret;
struct intel_gt *gt;
int ret, i;
if (drm_WARN_ON_ONCE(&dev_priv->drm, !HAS_RUNTIME_PM(dev_priv)))
return -ENODEV;
@ -1702,7 +1725,8 @@ static int intel_runtime_resume(struct device *kdev)
ret = vlv_resume_prepare(dev_priv, true);
intel_uncore_runtime_resume(&dev_priv->uncore);
for_each_gt(gt, dev_priv, i)
intel_uncore_runtime_resume(gt->uncore);
intel_runtime_pm_enable_interrupts(dev_priv);
@ -1710,7 +1734,8 @@ static int intel_runtime_resume(struct device *kdev)
* No point of rolling back things in case of an error, as the best
* we can do is to hope that things will still work (and disable RPM).
*/
intel_gt_runtime_resume(to_gt(dev_priv));
for_each_gt(gt, dev_priv, i)
intel_gt_runtime_resume(gt);
/*
* On VLV/CHV display interrupts are part of the display