phy: Add USB3 PHY support for Intel LGM SoC
Add support for USB PHY on Intel LGM SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20200828022312.52724-3-vadivel.muruganx.ramuthevar@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Ramuthevar Vadivel Murugan
Vinod Koul
parent
8a676e1be4
commit
1cce8f73a5
@ -49,6 +49,16 @@ config PHY_XGENE
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help
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This option enables support for APM X-Gene SoC multi-purpose PHY.
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config USB_LGM_PHY
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tristate "INTEL Lightning Mountain USB PHY Driver"
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select USB_PHY
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select REGULATOR
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select REGULATOR_FIXED_VOLTAGE
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help
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Enable this to support Intel DWC3 PHY USB phy. This driver provides
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interface to interact with USB GEN-II and USB 3.x PHY that is part
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of the Intel network SOC.
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source "drivers/phy/allwinner/Kconfig"
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source "drivers/phy/amlogic/Kconfig"
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source "drivers/phy/broadcom/Kconfig"
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@ -8,6 +8,7 @@ obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
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obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
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obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
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obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
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obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
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obj-y += allwinner/ \
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amlogic/ \
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broadcom/ \
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284
drivers/phy/phy-lgm-usb.c
Normal file
284
drivers/phy/phy-lgm-usb.c
Normal file
@ -0,0 +1,284 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel LGM USB PHY driver
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*
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* Copyright (C) 2020 Intel Corporation.
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*/
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/iopoll.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/usb/phy.h>
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#include <linux/workqueue.h>
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#define CTRL1_OFFSET 0x14
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#define SRAM_EXT_LD_DONE BIT(25)
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#define SRAM_INIT_DONE BIT(26)
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#define TCPC_OFFSET 0x1014
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#define TCPC_MUX_CTL GENMASK(1, 0)
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#define MUX_NC 0
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#define MUX_USB 1
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#define MUX_DP 2
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#define MUX_USBDP 3
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#define TCPC_FLIPPED BIT(2)
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#define TCPC_LOW_POWER_EN BIT(3)
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#define TCPC_VALID BIT(4)
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#define TCPC_CONN \
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(TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_USB))
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#define TCPC_DISCONN \
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(TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_NC) | TCPC_LOW_POWER_EN)
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static const char *const PHY_RESETS[] = { "phy31", "phy", };
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static const char *const CTL_RESETS[] = { "apb", "ctrl", };
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struct tca_apb {
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struct reset_control *resets[ARRAY_SIZE(PHY_RESETS)];
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struct regulator *vbus;
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struct work_struct wk;
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struct usb_phy phy;
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bool regulator_enabled;
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bool phy_initialized;
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bool connected;
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};
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static int get_flipped(struct tca_apb *ta, bool *flipped)
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{
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union extcon_property_value property;
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int ret;
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ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
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EXTCON_PROP_USB_TYPEC_POLARITY, &property);
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if (ret) {
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dev_err(ta->phy.dev, "no polarity property from extcon\n");
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return ret;
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}
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*flipped = property.intval;
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return 0;
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}
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static int phy_init(struct usb_phy *phy)
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{
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struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
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void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
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int val, ret, i;
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if (ta->phy_initialized)
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return 0;
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for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
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reset_control_deassert(ta->resets[i]);
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ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE, 10, 10 * 1000);
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if (ret) {
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dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
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return ret;
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}
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writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
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ta->phy_initialized = true;
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if (!ta->phy.edev) {
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writel(TCPC_CONN, ta->phy.io_priv + TCPC_OFFSET);
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return phy->set_vbus(phy, true);
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}
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schedule_work(&ta->wk);
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return ret;
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}
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static void phy_shutdown(struct usb_phy *phy)
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{
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struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
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int i;
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if (!ta->phy_initialized)
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return;
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ta->phy_initialized = false;
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flush_work(&ta->wk);
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ta->phy.set_vbus(&ta->phy, false);
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ta->connected = false;
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writel(TCPC_DISCONN, ta->phy.io_priv + TCPC_OFFSET);
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for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
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reset_control_assert(ta->resets[i]);
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}
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static int phy_set_vbus(struct usb_phy *phy, int on)
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{
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struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
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int ret;
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if (!!on == ta->regulator_enabled)
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return 0;
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if (on)
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ret = regulator_enable(ta->vbus);
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else
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ret = regulator_disable(ta->vbus);
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if (!ret)
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ta->regulator_enabled = on;
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dev_dbg(ta->phy.dev, "set vbus: %d\n", on);
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return ret;
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}
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static void tca_work(struct work_struct *work)
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{
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struct tca_apb *ta = container_of(work, struct tca_apb, wk);
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bool connected;
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bool flipped = false;
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u32 val;
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int ret;
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ret = get_flipped(ta, &flipped);
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if (ret)
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return;
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connected = extcon_get_state(ta->phy.edev, EXTCON_USB_HOST);
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if (connected == ta->connected)
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return;
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ta->connected = connected;
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if (connected) {
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val = TCPC_CONN;
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if (flipped)
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val |= TCPC_FLIPPED;
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dev_dbg(ta->phy.dev, "connected%s\n", flipped ? " flipped" : "");
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} else {
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val = TCPC_DISCONN;
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dev_dbg(ta->phy.dev, "disconnected\n");
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}
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writel(val, ta->phy.io_priv + TCPC_OFFSET);
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ret = ta->phy.set_vbus(&ta->phy, connected);
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if (ret)
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dev_err(ta->phy.dev, "failed to set VBUS\n");
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}
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static int id_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
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{
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struct tca_apb *ta = container_of(nb, struct tca_apb, phy.id_nb);
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if (ta->phy_initialized)
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schedule_work(&ta->wk);
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return NOTIFY_DONE;
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}
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static int vbus_notifier(struct notifier_block *nb, unsigned long evnt, void *ptr)
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{
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return NOTIFY_DONE;
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}
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static int phy_probe(struct platform_device *pdev)
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{
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struct reset_control *resets[ARRAY_SIZE(CTL_RESETS)];
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struct device *dev = &pdev->dev;
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struct usb_phy *phy;
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struct tca_apb *ta;
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int i;
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ta = devm_kzalloc(dev, sizeof(*ta), GFP_KERNEL);
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if (!ta)
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return -ENOMEM;
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platform_set_drvdata(pdev, ta);
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INIT_WORK(&ta->wk, tca_work);
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phy = &ta->phy;
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phy->dev = dev;
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phy->label = dev_name(dev);
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phy->type = USB_PHY_TYPE_USB3;
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phy->init = phy_init;
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phy->shutdown = phy_shutdown;
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phy->set_vbus = phy_set_vbus;
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phy->id_nb.notifier_call = id_notifier;
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phy->vbus_nb.notifier_call = vbus_notifier;
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phy->io_priv = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(phy->io_priv))
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return PTR_ERR(phy->io_priv);
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ta->vbus = devm_regulator_get(dev, "vbus");
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if (IS_ERR(ta->vbus))
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return PTR_ERR(ta->vbus);
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for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
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resets[i] = devm_reset_control_get_exclusive(dev, CTL_RESETS[i]);
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if (IS_ERR(resets[i])) {
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dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
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return PTR_ERR(resets[i]);
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}
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}
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for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
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ta->resets[i] = devm_reset_control_get_exclusive(dev, PHY_RESETS[i]);
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if (IS_ERR(ta->resets[i])) {
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dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
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return PTR_ERR(ta->resets[i]);
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}
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}
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for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
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reset_control_assert(resets[i]);
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for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
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reset_control_assert(ta->resets[i]);
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/*
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* Out-of-band reset of the controller after PHY reset will cause
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* controller malfunctioning, so we should use in-band controller
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* reset only and leave the controller de-asserted here.
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*/
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for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
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reset_control_deassert(resets[i]);
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/* Need to wait at least 20us after de-assert the controller */
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usleep_range(20, 100);
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return usb_add_phy_dev(phy);
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}
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static int phy_remove(struct platform_device *pdev)
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{
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struct tca_apb *ta = platform_get_drvdata(pdev);
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usb_remove_phy(&ta->phy);
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return 0;
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}
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static const struct of_device_id intel_usb_phy_dt_ids[] = {
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{ .compatible = "intel,lgm-usb-phy" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, intel_usb_phy_dt_ids);
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static struct platform_driver lgm_phy_driver = {
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.driver = {
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.name = "lgm-usb-phy",
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.of_match_table = intel_usb_phy_dt_ids,
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},
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.probe = phy_probe,
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.remove = phy_remove,
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};
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module_platform_driver(lgm_phy_driver);
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MODULE_DESCRIPTION("Intel LGM USB PHY driver");
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MODULE_AUTHOR("Li Yin <yin1.li@intel.com>");
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MODULE_AUTHOR("Vadivel Murugan R <vadivel.muruganx.ramuthevar@linux.intel.com>");
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MODULE_LICENSE("GPL v2");
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