x86: clean up cpu capabilities accesses, cyrix.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -190,12 +190,12 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
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* 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway
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*/
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clear_bit(0*32+31, c->x86_capability);
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clear_cpu_cap(c, 0*32+31);
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/* Cyrix used bit 24 in extended (AMD) CPUID for Cyrix MMX extensions */
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if (test_bit(1*32+24, c->x86_capability)) {
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clear_bit(1*32+24, c->x86_capability);
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set_bit(X86_FEATURE_CXMMX, c->x86_capability);
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if (test_cpu_cap(c, 1*32+24)) {
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clear_cpu_cap(c, 1*32+24);
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set_cpu_cap(c, X86_FEATURE_CXMMX);
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}
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do_cyrix_devid(&dir0, &dir1);
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@ -242,7 +242,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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} else /* 686 */
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p = Cx86_cb+1;
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/* Emulate MTRRs using Cyrix's ARRs. */
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set_bit(X86_FEATURE_CYRIX_ARR, c->x86_capability);
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set_cpu_cap(c, X86_FEATURE_CYRIX_ARR);
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/* 6x86's contain this bug */
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c->coma_bug = 1;
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break;
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@ -319,7 +319,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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if (((dir1 & 0x0f) > 4) || ((dir1 & 0xf0) == 0x20))
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(c->x86_model)++;
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/* Emulate MTRRs using Cyrix's ARRs. */
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set_bit(X86_FEATURE_CYRIX_ARR, c->x86_capability);
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set_cpu_cap(c, X86_FEATURE_CYRIX_ARR);
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break;
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case 0xf: /* Cyrix 486 without DEVID registers */
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