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arm64: dts: ls1028a: add crypto node

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LS1028A has a SEC v5.0 compatible security engine.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Horia Geantă 2019-06-10 18:23:31 +03:00 committed by Shawn Guo
parent 55d0f98a2d
commit 1d0becabdc
3 changed files with 41 additions and 0 deletions
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1
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
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@ -17,6 +17,7 @@
compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
aliases {
crypto = &crypto;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;

1
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
View File

@ -16,6 +16,7 @@
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
aliases {
crypto = &crypto;
serial0 = &duart0;
serial1 = &duart1;
};

39
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View File

@ -388,6 +388,45 @@
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
};
crypto: crypto@8000000 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
fsl,sec-era = <10>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x8000000 0x100000>;
reg = <0x00 0x8000000 0x0 0x100000>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
sec_jr0: jr@10000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x10000 0x10000>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr@20000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x20000 0x10000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr@30000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x30000 0x10000>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr3: jr@40000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x40000 0x10000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
};
};
cluster1_core0_watchdog: watchdog@c000000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;