Avoid SMP cacheflushes. This is a minor optimization of startup but
will also avoid smp_call_function from doing stupid things when called from a CPU that is not yet marked online. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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bdf21b18b4
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1d40cfcd34
@ -1150,6 +1150,7 @@ static inline void signal32_init(void)
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extern void cpu_cache_init(void);
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extern void tlb_init(void);
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extern void flush_tlb_handlers(void);
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void __init per_cpu_trap_init(void)
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{
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@ -1348,4 +1349,5 @@ void __init trap_init(void)
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#endif
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flush_icache_range(ebase, ebase + 0x400);
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flush_tlb_handlers();
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}
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@ -1270,9 +1270,8 @@ void __init ld_mmu_r4xx0(void)
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_dma_cache_inv = r4k_dma_cache_inv;
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#endif
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__flush_cache_all();
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coherency_setup();
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build_clear_page();
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build_copy_page();
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local_r4k___flush_cache_all(NULL);
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coherency_setup();
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}
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@ -492,4 +492,5 @@ void __init ld_mmu_tx39(void)
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build_clear_page();
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build_copy_page();
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tx39h_flush_icache_all();
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}
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@ -404,9 +404,6 @@ dest = label();
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build_jr_ra();
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flush_icache_range((unsigned long)&clear_page_array,
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(unsigned long) epc);
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BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
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}
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@ -482,8 +479,5 @@ dest = label();
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build_jr_ra();
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flush_icache_range((unsigned long)©_page_array,
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(unsigned long) epc);
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BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
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}
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@ -743,7 +743,6 @@ static void __init build_r3000_tlb_refill_handler(void)
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#endif
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memcpy((void *)CAC_BASE, tlb_handler, 0x80);
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flush_icache_range(CAC_BASE, CAC_BASE + 0x80);
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}
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/*
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@ -1258,7 +1257,6 @@ static void __init build_r4000_tlb_refill_handler(void)
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#endif
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memcpy((void *)CAC_BASE, final_handler, 0x100);
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flush_icache_range(CAC_BASE, CAC_BASE + 0x100);
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}
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/*
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@ -1519,9 +1517,6 @@ static void __init build_r3000_tlb_load_handler(void)
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printk("%08x\n", handle_tlbl[i]);
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}
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#endif
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flush_icache_range((unsigned long)handle_tlbl,
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(unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
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}
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static void __init build_r3000_tlb_store_handler(void)
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@ -1559,9 +1554,6 @@ static void __init build_r3000_tlb_store_handler(void)
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printk("%08x\n", handle_tlbs[i]);
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}
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#endif
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flush_icache_range((unsigned long)handle_tlbs,
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(unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
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}
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static void __init build_r3000_tlb_modify_handler(void)
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@ -1599,9 +1591,6 @@ static void __init build_r3000_tlb_modify_handler(void)
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printk("%08x\n", handle_tlbm[i]);
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}
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#endif
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flush_icache_range((unsigned long)handle_tlbm,
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(unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
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}
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/*
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@ -1691,9 +1680,6 @@ static void __init build_r4000_tlb_load_handler(void)
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printk("%08x\n", handle_tlbl[i]);
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}
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#endif
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flush_icache_range((unsigned long)handle_tlbl,
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(unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
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}
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static void __init build_r4000_tlb_store_handler(void)
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@ -1730,9 +1716,6 @@ static void __init build_r4000_tlb_store_handler(void)
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printk("%08x\n", handle_tlbs[i]);
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}
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#endif
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flush_icache_range((unsigned long)handle_tlbs,
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(unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
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}
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static void __init build_r4000_tlb_modify_handler(void)
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@ -1770,9 +1753,6 @@ static void __init build_r4000_tlb_modify_handler(void)
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printk("%08x\n", handle_tlbm[i]);
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}
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#endif
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flush_icache_range((unsigned long)handle_tlbm,
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(unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
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}
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void __init build_tlb_refill_handler(void)
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@ -1820,3 +1800,13 @@ void __init build_tlb_refill_handler(void)
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}
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}
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}
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void __init flush_tlb_handlers(void)
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{
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flush_icache_range((unsigned long)handle_tlbl,
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(unsigned long)handle_tlbl + sizeof(handle_tlbl));
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flush_icache_range((unsigned long)handle_tlbs,
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(unsigned long)handle_tlbs + sizeof(handle_tlbs));
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flush_icache_range((unsigned long)handle_tlbm,
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(unsigned long)handle_tlbm + sizeof(handle_tlbm));
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}
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