drm/amdgpu: Reset CP_VMID_PREEMPT after trailing fence signaled
When MEC executes unmap_queue for mid command buffer preemption, it will kick the write pointer of the gfx ring, set CP_VMID_PREEMPT to trigger the preemption and wait for CP_VMID_PREEMPT becomes zero after the preemption done. There is a race condition that PFP may excute the resetting command before MEC set CP_VMID_PREEMPT. As a result, hang happens as CP_VMID_PREEMPT is always 0xffff. To avoid this, we send resetting CP_VMID_PREEMPT command after the trailing fence is siganled and update gfx write pointer explicitly. Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.3.x Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2535
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@ -5369,10 +5369,6 @@ static int gfx_v9_0_ring_preempt_ib(struct amdgpu_ring *ring)
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amdgpu_ring_alloc(ring, 13);
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gfx_v9_0_ring_emit_fence(ring, ring->trail_fence_gpu_addr,
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ring->trail_seq, AMDGPU_FENCE_FLAG_EXEC | AMDGPU_FENCE_FLAG_INT);
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/*reset the CP_VMID_PREEMPT after trailing fence*/
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amdgpu_ring_emit_wreg(ring,
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SOC15_REG_OFFSET(GC, 0, mmCP_VMID_PREEMPT),
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0x0);
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/* assert IB preemption, emit the trailing fence */
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kiq->pmf->kiq_unmap_queues(kiq_ring, ring, PREEMPT_QUEUES_NO_UNMAP,
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@ -5395,6 +5391,10 @@ static int gfx_v9_0_ring_preempt_ib(struct amdgpu_ring *ring)
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DRM_WARN("ring %d timeout to preempt ib\n", ring->idx);
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}
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/*reset the CP_VMID_PREEMPT after trailing fence*/
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amdgpu_ring_emit_wreg(ring,
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SOC15_REG_OFFSET(GC, 0, mmCP_VMID_PREEMPT),
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0x0);
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amdgpu_ring_commit(ring);
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/* deassert preemption condition */
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