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clk: qcom: Add LUCID_OLE PLL type for SM8550

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Add a LUCID_OLE PLL type for SM8550 SoC from Qualcomm.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221130112852.2977816-5-abel.vesa@linaro.org
This commit is contained in:
Abel Vesa 2022-11-30 13:28:47 +02:00 committed by Bjorn Andersson
parent 7364379d72
commit 1de7e70941
2 changed files with 21 additions and 0 deletions
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16
drivers/clk/qcom/clk-alpha-pll.c
View File

@ -155,6 +155,22 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
[PLL_OFF_TEST_CTL_U] = 0x30, [PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U1] = 0x34, [PLL_OFF_TEST_CTL_U1] = 0x34,
}, },
[CLK_ALPHA_PLL_TYPE_LUCID_OLE] = {
[PLL_OFF_OPMODE] = 0x04,
[PLL_OFF_STATE] = 0x08,
[PLL_OFF_STATUS] = 0x0c,
[PLL_OFF_L_VAL] = 0x10,
[PLL_OFF_ALPHA_VAL] = 0x14,
[PLL_OFF_USER_CTL] = 0x18,
[PLL_OFF_USER_CTL_U] = 0x1c,
[PLL_OFF_CONFIG_CTL] = 0x20,
[PLL_OFF_CONFIG_CTL_U] = 0x24,
[PLL_OFF_CONFIG_CTL_U1] = 0x28,
[PLL_OFF_TEST_CTL] = 0x2c,
[PLL_OFF_TEST_CTL_U] = 0x30,
[PLL_OFF_TEST_CTL_U1] = 0x34,
[PLL_OFF_TEST_CTL_U2] = 0x38,
},
[CLK_ALPHA_PLL_TYPE_RIVIAN_EVO] = { [CLK_ALPHA_PLL_TYPE_RIVIAN_EVO] = {
[PLL_OFF_OPMODE] = 0x04, [PLL_OFF_OPMODE] = 0x04,
[PLL_OFF_STATUS] = 0x0c, [PLL_OFF_STATUS] = 0x0c,

5
drivers/clk/qcom/clk-alpha-pll.h
View File

@ -18,6 +18,7 @@ enum {
CLK_ALPHA_PLL_TYPE_AGERA, CLK_ALPHA_PLL_TYPE_AGERA,
CLK_ALPHA_PLL_TYPE_ZONDA, CLK_ALPHA_PLL_TYPE_ZONDA,
CLK_ALPHA_PLL_TYPE_LUCID_EVO, CLK_ALPHA_PLL_TYPE_LUCID_EVO,
CLK_ALPHA_PLL_TYPE_LUCID_OLE,
CLK_ALPHA_PLL_TYPE_RIVIAN_EVO, CLK_ALPHA_PLL_TYPE_RIVIAN_EVO,
CLK_ALPHA_PLL_TYPE_DEFAULT_EVO, CLK_ALPHA_PLL_TYPE_DEFAULT_EVO,
CLK_ALPHA_PLL_TYPE_BRAMMO_EVO, CLK_ALPHA_PLL_TYPE_BRAMMO_EVO,
@ -38,6 +39,8 @@ enum {
PLL_OFF_TEST_CTL, PLL_OFF_TEST_CTL,
PLL_OFF_TEST_CTL_U, PLL_OFF_TEST_CTL_U,
PLL_OFF_TEST_CTL_U1, PLL_OFF_TEST_CTL_U1,
PLL_OFF_TEST_CTL_U2,
PLL_OFF_STATE,
PLL_OFF_STATUS, PLL_OFF_STATUS,
PLL_OFF_OPMODE, PLL_OFF_OPMODE,
PLL_OFF_FRAC, PLL_OFF_FRAC,
@ -160,7 +163,9 @@ extern const struct clk_ops clk_alpha_pll_zonda_ops;
extern const struct clk_ops clk_alpha_pll_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_lucid_evo_ops;
extern const struct clk_ops clk_alpha_pll_reset_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_reset_lucid_evo_ops;
extern const struct clk_ops clk_alpha_pll_fixed_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_fixed_lucid_evo_ops;
#define clk_alpha_pll_fixed_lucid_ole_ops clk_alpha_pll_fixed_lucid_evo_ops
extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops;
#define clk_alpha_pll_postdiv_lucid_ole_ops clk_alpha_pll_postdiv_lucid_evo_ops
extern const struct clk_ops clk_alpha_pll_rivian_evo_ops; extern const struct clk_ops clk_alpha_pll_rivian_evo_ops;
#define clk_alpha_pll_postdiv_rivian_evo_ops clk_alpha_pll_postdiv_fabia_ops #define clk_alpha_pll_postdiv_rivian_evo_ops clk_alpha_pll_postdiv_fabia_ops