sparc32: delete pgtsun4c.h
Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sam Ravnborg
David S. Miller
parent
582a0baee5
commit
1ee0e14407
@ -16,7 +16,6 @@
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#include <linux/spinlock.h>
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#include <linux/swap.h>
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#include <asm/types.h>
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#include <asm/pgtsun4c.h>
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#include <asm/pgtsrmmu.h>
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#include <asm/vac-ops.h>
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#include <asm/oplib.h>
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@ -47,7 +46,7 @@ BTFIXUPDEF_INT(page_copy)
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BTFIXUPDEF_INT(page_readonly)
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BTFIXUPDEF_INT(page_kernel)
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#define PMD_SHIFT SUN4C_PMD_SHIFT
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#define PMD_SHIFT 22
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK)
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@ -399,9 +398,6 @@ static inline unsigned long
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__get_phys (unsigned long addr)
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{
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switch (sparc_cpu_model){
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case sun4:
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case sun4c:
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return sun4c_get_pte (addr) << PAGE_SHIFT;
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case sun4m:
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case sun4d:
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return ((srmmu_get_pte (addr) & 0xffffff00) << 4);
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@ -414,9 +410,6 @@ static inline int
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__get_iospace (unsigned long addr)
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{
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switch (sparc_cpu_model){
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case sun4:
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case sun4c:
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return -1; /* Don't check iospace on sun4c */
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case sun4m:
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case sun4d:
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return (srmmu_get_pte (addr) >> 28);
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@ -463,7 +456,7 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma,
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set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
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flush_tlb_page(__vma, __address); \
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} \
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(sparc_cpu_model == sun4c) || __changed; \
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__changed; \
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})
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#include <asm-generic/pgtable.h>
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@ -1,172 +0,0 @@
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/*
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* pgtsun4c.h: Sun4c specific pgtable.h defines and code.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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*/
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#ifndef _SPARC_PGTSUN4C_H
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#define _SPARC_PGTSUN4C_H
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#include <asm/contregs.h>
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/* PMD_SHIFT determines the size of the area a second-level page table can map */
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#define SUN4C_PMD_SHIFT 22
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/* PGDIR_SHIFT determines what a third-level page table entry can map */
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#define SUN4C_PGDIR_SHIFT 22
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#define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT)
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#define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1))
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#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK)
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/* To represent how the sun4c mmu really lays things out. */
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#define SUN4C_REAL_PGDIR_SHIFT 18
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#define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT)
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#define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1))
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#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK)
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/* 16 bit PFN on sun4c */
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#define SUN4C_PFN_MASK 0xffff
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/* Don't increase these unless the structures in sun4c.c are fixed */
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#define SUN4C_MAX_SEGMAPS 256
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#define SUN4C_MAX_CONTEXTS 16
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/*
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* To be efficient, and not have to worry about allocating such
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* a huge pgd, we make the kernel sun4c tables each hold 1024
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* entries and the pgd similarly just like the i386 tables.
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*/
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#define SUN4C_PTRS_PER_PTE 1024
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#define SUN4C_PTRS_PER_PMD 1
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#define SUN4C_PTRS_PER_PGD 1024
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/*
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* Sparc SUN4C pte fields.
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*/
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#define _SUN4C_PAGE_VALID 0x80000000
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#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */
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#define _SUN4C_PAGE_DIRTY 0x40000000
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#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */
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#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */
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#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */
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#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */
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#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */
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#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */
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#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */
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#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */
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#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */
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#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */
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#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\
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_SUN4C_PAGE_ACCESSED)
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#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\
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_SUN4C_PAGE_MODIFIED)
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#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED)
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#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT)
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#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\
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_SUN4C_PAGE_WRITE)
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#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
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#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE)
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#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\
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_SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV)
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/* SUN4C swap entry encoding
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*
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* We use 5 bits for the type and 19 for the offset. This gives us
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* 32 swapfiles of 4GB each. Encoding looks like:
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*
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* RRRRRRRRooooooooooooooooooottttt
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* fedcba9876543210fedcba9876543210
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*
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* The top 8 bits are reserved for protection and status bits, especially
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* FILE and PRESENT.
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*/
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#define SUN4C_SWP_TYPE_MASK 0x1f
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#define SUN4C_SWP_OFF_MASK 0x7ffff
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#define SUN4C_SWP_OFF_SHIFT 5
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#ifndef __ASSEMBLY__
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static inline unsigned long sun4c_get_synchronous_error(void)
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{
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unsigned long sync_err;
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__asm__ __volatile__("lda [%1] %2, %0\n\t" :
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"=r" (sync_err) :
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"r" (AC_SYNC_ERR), "i" (ASI_CONTROL));
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return sync_err;
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}
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static inline unsigned long sun4c_get_synchronous_address(void)
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{
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unsigned long sync_addr;
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__asm__ __volatile__("lda [%1] %2, %0\n\t" :
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"=r" (sync_addr) :
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"r" (AC_SYNC_VA), "i" (ASI_CONTROL));
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return sync_addr;
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}
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/* SUN4C pte, segmap, and context manipulation */
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static inline unsigned long sun4c_get_segmap(unsigned long addr)
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{
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register unsigned long entry;
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__asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
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"=r" (entry) :
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"r" (addr), "i" (ASI_SEGMAP));
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return entry;
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}
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static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry)
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{
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__asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : :
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"r" (addr), "r" (entry),
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"i" (ASI_SEGMAP)
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: "memory");
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}
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static inline unsigned long sun4c_get_pte(unsigned long addr)
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{
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register unsigned long entry;
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__asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" :
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"=r" (entry) :
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"r" (addr), "i" (ASI_PTE));
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return entry;
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}
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static inline void sun4c_put_pte(unsigned long addr, unsigned long entry)
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{
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__asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : :
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"r" (addr),
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"r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE)
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: "memory");
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}
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static inline int sun4c_get_context(void)
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{
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register int ctx;
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__asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" :
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"=r" (ctx) :
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"r" (AC_CONTEXT), "i" (ASI_CONTROL));
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return ctx;
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}
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static inline int sun4c_set_context(int ctx)
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{
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__asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : :
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"r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL)
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: "memory");
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return ctx;
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}
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#endif /* !(__ASSEMBLY__) */
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#endif /* !(_SPARC_PGTSUN4C_H) */
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@ -19,7 +19,6 @@
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#include <asm/vaddrs.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/pgtsun4c.h>
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#include <asm/winmacro.h>
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#include <asm/signal.h>
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#include <asm/obio.h>
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