e1000e: Add support for the next LOM generation
Add devices IDs for the next LOM generations that will be available on the next Intel Client platforms. This patch provides the initial support for these devices. Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Tested-by: Naama Meir <naamax.meir@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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@ -917,6 +917,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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mask |= BIT(18);
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break;
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default:
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@ -1585,6 +1586,7 @@ static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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fext_nvm11 = er32(FEXTNVM11);
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fext_nvm11 &= ~E1000_FEXTNVM11_DISABLE_MULR_FIX;
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ew32(FEXTNVM11, fext_nvm11);
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@ -122,6 +122,8 @@ struct e1000_hw;
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#define E1000_DEV_ID_PCH_PTP_I219_V26 0x57B6
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#define E1000_DEV_ID_PCH_PTP_I219_LM27 0x57B7
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#define E1000_DEV_ID_PCH_PTP_I219_V27 0x57B8
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#define E1000_DEV_ID_PCH_NVL_I219_LM29 0x57B9
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#define E1000_DEV_ID_PCH_NVL_I219_V29 0x57BA
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#define E1000_REVISION_4 4
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@ -150,6 +152,7 @@ enum e1000_mac_type {
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e1000_pch_mtp,
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e1000_pch_lnp,
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e1000_pch_ptp,
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e1000_pch_nvp,
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};
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enum e1000_media_type {
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@ -323,6 +323,7 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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if (e1000_phy_is_accessible_pchlan(hw))
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break;
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@ -470,6 +471,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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/* In case the PHY needs to be in mdio slow mode,
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* set slow mode and try to get the PHY id again.
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*/
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@ -717,6 +719,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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case e1000_pchlan:
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/* check management mode */
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mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan;
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@ -1685,6 +1688,7 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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rc = e1000_init_phy_params_pchlan(hw);
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break;
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default:
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@ -2142,6 +2146,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
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break;
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default:
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@ -3188,6 +3193,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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bank1_offset = nvm->flash_bank_size;
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act_offset = E1000_ICH_NVM_SIG_WORD;
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@ -4129,6 +4135,7 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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word = NVM_COMPAT;
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valid_csum_mask = NVM_COMPAT_VALID_CSUM;
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break;
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@ -3545,6 +3545,7 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
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/* Stable 24MHz frequency */
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incperiod = INCPERIOD_24MHZ;
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@ -4061,6 +4062,7 @@ void e1000e_reset(struct e1000_adapter *adapter)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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fc->refresh_time = 0xFFFF;
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fc->pause_time = 0xFFFF;
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@ -7913,6 +7915,8 @@ static const struct pci_device_id e1000_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V26), board_pch_mtp },
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM27), board_pch_mtp },
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V27), board_pch_mtp },
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_LM29), board_pch_mtp },
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_V29), board_pch_mtp },
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{ 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
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};
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@ -288,6 +288,7 @@ void e1000e_ptp_init(struct e1000_adapter *adapter)
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case e1000_pch_mtp:
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case e1000_pch_lnp:
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case e1000_pch_ptp:
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case e1000_pch_nvp:
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if ((hw->mac.type < e1000_pch_lpt) ||
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(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
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adapter->ptp_clock_info.max_adj = 24000000 - 1;
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