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x86: ce4100: Configure IOAPIC pins for USB and SATA to level type

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The USB and SATA ioapic interrrupt pins are configured as edge type,
but need to be level type interrupts to work correctly.

[ tglx: Split out from the combo patch ]

Cc: Torben Hohn <torbenh@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Link: http://lkml.kernel.org/r/%3C20110427143052.GA15211%40linutronix.de%3E
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Sebastian Andrzej Siewior 2011-04-27 16:30:52 +02:00 committed by Thomas Gleixner
parent 20443598d9
commit 1ff42c32c7
1 changed files with 3 additions and 3 deletions
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6
arch/x86/platform/ce4100/falconfalls.dts
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@ -347,7 +347,7 @@
"pciclass0c03";
reg = <0x16800 0x0 0x0 0x0 0x0>;
interrupts = <22 3>;
interrupts = <22 1>;
};
usb@d,1 {
@ -357,7 +357,7 @@
"pciclass0c03";
reg = <0x16900 0x0 0x0 0x0 0x0>;
interrupts = <22 3>;
interrupts = <22 1>;
};
sata@e,0 {
@ -367,7 +367,7 @@
"pciclass0106";
reg = <0x17000 0x0 0x0 0x0 0x0>;
interrupts = <23 3>;
interrupts = <23 1>;
};
flash@f,0 {