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drm/amd/display: update disp pattern generator routine for DCN30

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Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Aurabindo Pillai 2022-04-26 14:29:15 -04:00 committed by Alex Deucher
parent 327f79d7a1
commit 214d72f629
1 changed files with 2 additions and 31 deletions
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33
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
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@ -959,35 +959,6 @@ void dcn30_set_disp_pattern_generator(const struct dc *dc,
const struct tg_color *solid_color,
int width, int height, int offset)
{
struct stream_resource *stream_res = &pipe_ctx->stream_res;
struct pipe_ctx *mpcc_pipe;
if (test_pattern != CONTROLLER_DP_TEST_PATTERN_VIDEOMODE) {
pipe_ctx->vtp_locked = false;
/* turning on DPG */
stream_res->opp->funcs->opp_set_disp_pattern_generator(stream_res->opp, test_pattern, color_space,
color_depth, solid_color, width, height, offset);
/* Defer hubp blank if tg is locked */
if (stream_res->tg->funcs->is_tg_enabled(stream_res->tg)) {
if (stream_res->tg->funcs->is_locked(stream_res->tg))
pipe_ctx->vtp_locked = true;
else {
/* Blank HUBP to allow p-state during blank on all timings */
pipe_ctx->plane_res.hubp->funcs->set_blank(pipe_ctx->plane_res.hubp, true);
for (mpcc_pipe = pipe_ctx->bottom_pipe; mpcc_pipe; mpcc_pipe = mpcc_pipe->bottom_pipe)
mpcc_pipe->plane_res.hubp->funcs->set_blank(mpcc_pipe->plane_res.hubp, true);
}
}
} else {
/* turning off DPG */
pipe_ctx->plane_res.hubp->funcs->set_blank(pipe_ctx->plane_res.hubp, false);
for (mpcc_pipe = pipe_ctx->bottom_pipe; mpcc_pipe; mpcc_pipe = mpcc_pipe->bottom_pipe)
if (mpcc_pipe->plane_res.hubp)
mpcc_pipe->plane_res.hubp->funcs->set_blank(mpcc_pipe->plane_res.hubp, false);
stream_res->opp->funcs->opp_set_disp_pattern_generator(stream_res->opp, test_pattern, color_space,
color_depth, solid_color, width, height, offset);
}
pipe_ctx->stream_res.opp->funcs->opp_set_disp_pattern_generator(pipe_ctx->stream_res.opp, test_pattern,
color_space, color_depth, solid_color, width, height, offset);
}