[MIPS] Atlas: Remove support code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
372a775f50
commit
2157bc6871
@ -181,38 +181,6 @@ config LEMOTE_FULONG
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Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
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an FPGA northbridge
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config MIPS_ATLAS
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bool "MIPS Atlas board"
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select BOOT_ELF32
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select BOOT_RAW
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select CEVT_R4K
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select CSRC_R4K
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select DMA_NONCOHERENT
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select SYS_HAS_EARLY_PRINTK
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select IRQ_CPU
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select HW_HAS_PCI
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select MIPS_BOARDS_GEN
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select MIPS_BONITO64
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select PCI_GT64XXX_PCI0
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select MIPS_MSC
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select RM7000_CPU_SCACHE
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select SWAP_IO_SPACE
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select SYS_HAS_CPU_MIPS32_R1
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_HAS_CPU_MIPS64_R1
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select SYS_HAS_CPU_NEVADA
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select SYS_HAS_CPU_RM7000
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_64BIT_KERNEL
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
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select SYS_SUPPORTS_SMARTMIPS
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select GENERIC_HARDIRQS_NO__DO_IRQ
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help
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This enables support for the MIPS Technologies Atlas evaluation
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board.
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config MIPS_MALTA
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bool "MIPS Malta board"
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select ARCH_MAY_HAVE_PC_FDC
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@ -309,15 +309,6 @@ cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
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#
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core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
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#
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# MIPS Atlas board
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#
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core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
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cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
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cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
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load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
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all-$(CONFIG_MIPS_ATLAS) := vmlinux.bin
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#
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# MIPS Malta board
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#
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File diff suppressed because it is too large
Load Diff
@ -16,7 +16,6 @@ CONFIG_BCM47XX=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS_COBALT=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_DB1000=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_DB1100=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_DB1200=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_DB1500=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_DB1550=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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CONFIG_MACH_DECSTATION=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_BASLER_EXCITE=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -14,7 +14,6 @@ CONFIG_LEMOTE_FULONG=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -15,7 +15,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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CONFIG_MACH_JAZZ=y
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -15,7 +15,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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CONFIG_LASAT=y
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -15,7 +15,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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CONFIG_MIPS_MALTA=y
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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CONFIG_MIPS_SIM=y
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -14,7 +14,6 @@ CONFIG_MACH_ALCHEMY=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_PB1100=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_PB1500=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -27,7 +27,6 @@ CONFIG_MIPS_PB1550=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_WR_PPMC is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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CONFIG_MIPS_SEAD=y
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# CONFIG_WR_PPMC is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -16,7 +16,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LASAT is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -14,7 +14,6 @@ CONFIG_MIPS=y
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_LEMOTE_FULONG is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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# CONFIG_MIPS_SIM is not set
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
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# CONFIG_MACH_DECSTATION is not set
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# CONFIG_MACH_JAZZ is not set
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# CONFIG_MIPS_ATLAS is not set
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# CONFIG_MIPS_MALTA is not set
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# CONFIG_MIPS_SEAD is not set
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CONFIG_WR_PPMC=y
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@ -26,7 +26,6 @@ CONFIG_ZONE_DMA=y
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# CONFIG_MIPS_COBALT is not set
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_MIPS_ATLAS is not set
|
||||
# CONFIG_MIPS_MALTA is not set
|
||||
# CONFIG_MIPS_SEAD is not set
|
||||
# CONFIG_WR_PPMC is not set
|
||||
|
@ -1,22 +0,0 @@
|
||||
#
|
||||
# Carsten Langgaard, carstenl@mips.com
|
||||
# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
|
||||
#
|
||||
# This program is free software; you can distribute it and/or modify it
|
||||
# under the terms of the GNU General Public License (Version 2) as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# This program is distributed in the hope it will be useful, but WITHOUT
|
||||
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
# for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License along
|
||||
# with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
#
|
||||
|
||||
obj-y := atlas_int.o atlas_setup.o
|
||||
obj-$(CONFIG_KGDB) += atlas_gdb.o
|
||||
|
||||
EXTRA_CFLAGS += -Werror
|
@ -1,97 +0,0 @@
|
||||
/*
|
||||
* Carsten Langgaard, carstenl@mips.com
|
||||
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*
|
||||
* This is the interface to the remote debugger stub.
|
||||
*/
|
||||
#include <asm/io.h>
|
||||
#include <asm/mips-boards/atlas.h>
|
||||
#include <asm/mips-boards/saa9730_uart.h>
|
||||
|
||||
#define INB(a) inb((unsigned long)a)
|
||||
#define OUTB(x, a) outb(x, (unsigned long)a)
|
||||
|
||||
/*
|
||||
* This is the interface to the remote debugger stub
|
||||
* if the Philips part is used for the debug port,
|
||||
* called from the platform setup code.
|
||||
*/
|
||||
void *saa9730_base = (void *)ATLAS_SAA9730_REG;
|
||||
|
||||
static int saa9730_kgdb_active = 0;
|
||||
|
||||
#define SAA9730_BAUDCLOCK(baud) (((ATLAS_SAA9730_BAUDCLOCK/(baud))/16)-1)
|
||||
|
||||
int saa9730_kgdb_hook(int speed)
|
||||
{
|
||||
int baudclock;
|
||||
t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
|
||||
|
||||
/*
|
||||
* Clear all interrupts
|
||||
*/
|
||||
(void) INB(&kgdb_uart->Lsr);
|
||||
(void) INB(&kgdb_uart->Msr);
|
||||
(void) INB(&kgdb_uart->Thr_Rbr);
|
||||
(void) INB(&kgdb_uart->Iir_Fcr);
|
||||
|
||||
/*
|
||||
* Now, initialize the UART
|
||||
*/
|
||||
/* 8 data bits, one stop bit, no parity */
|
||||
OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
|
||||
|
||||
baudclock = SAA9730_BAUDCLOCK(speed);
|
||||
|
||||
OUTB((baudclock >> 16) & 0xff, &kgdb_uart->BaudDivMsb);
|
||||
OUTB( baudclock & 0xff, &kgdb_uart->BaudDivLsb);
|
||||
|
||||
/* Set RTS/DTR active */
|
||||
OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
|
||||
saa9730_kgdb_active = 1;
|
||||
|
||||
return speed;
|
||||
}
|
||||
|
||||
int saa9730_putDebugChar(char c)
|
||||
{
|
||||
t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
|
||||
|
||||
if (!saa9730_kgdb_active) { /* need to init device first */
|
||||
return 0;
|
||||
}
|
||||
|
||||
while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
|
||||
;
|
||||
OUTB(c, &kgdb_uart->Thr_Rbr);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
char saa9730_getDebugChar(void)
|
||||
{
|
||||
t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
|
||||
char c;
|
||||
|
||||
if (!saa9730_kgdb_active) { /* need to init device first */
|
||||
return 0;
|
||||
}
|
||||
while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
|
||||
;
|
||||
|
||||
c = INB(&kgdb_uart->Thr_Rbr);
|
||||
return(c);
|
||||
}
|
@ -1,272 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 1999, 2000, 2006 MIPS Technologies, Inc.
|
||||
* All rights reserved.
|
||||
* Authors: Carsten Langgaard <carstenl@mips.com>
|
||||
* Maciej W. Rozycki <macro@mips.com>
|
||||
*
|
||||
* ########################################################################
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*
|
||||
* ########################################################################
|
||||
*
|
||||
* Routines for generic manipulation of the interrupts found on the MIPS
|
||||
* Atlas board.
|
||||
*
|
||||
*/
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/gdb-stub.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq_cpu.h>
|
||||
#include <asm/msc01_ic.h>
|
||||
|
||||
#include <asm/mips-boards/atlas.h>
|
||||
#include <asm/mips-boards/atlasint.h>
|
||||
#include <asm/mips-boards/generic.h>
|
||||
|
||||
static struct atlas_ictrl_regs *atlas_hw0_icregs;
|
||||
|
||||
#if 0
|
||||
#define DEBUG_INT(x...) printk(x)
|
||||
#else
|
||||
#define DEBUG_INT(x...)
|
||||
#endif
|
||||
|
||||
void disable_atlas_irq(unsigned int irq_nr)
|
||||
{
|
||||
atlas_hw0_icregs->intrsten = 1 << (irq_nr - ATLAS_INT_BASE);
|
||||
iob();
|
||||
}
|
||||
|
||||
void enable_atlas_irq(unsigned int irq_nr)
|
||||
{
|
||||
atlas_hw0_icregs->intseten = 1 << (irq_nr - ATLAS_INT_BASE);
|
||||
iob();
|
||||
}
|
||||
|
||||
static void end_atlas_irq(unsigned int irq)
|
||||
{
|
||||
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
|
||||
enable_atlas_irq(irq);
|
||||
}
|
||||
|
||||
static struct irq_chip atlas_irq_type = {
|
||||
.name = "Atlas",
|
||||
.ack = disable_atlas_irq,
|
||||
.mask = disable_atlas_irq,
|
||||
.mask_ack = disable_atlas_irq,
|
||||
.unmask = enable_atlas_irq,
|
||||
.eoi = enable_atlas_irq,
|
||||
.end = end_atlas_irq,
|
||||
};
|
||||
|
||||
static inline int ls1bit32(unsigned int x)
|
||||
{
|
||||
int b = 31, s;
|
||||
|
||||
s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
|
||||
s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
|
||||
s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
|
||||
s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
|
||||
s = 1; if (x << 1 == 0) s = 0; b -= s;
|
||||
|
||||
return b;
|
||||
}
|
||||
|
||||
static inline void atlas_hw0_irqdispatch(void)
|
||||
{
|
||||
unsigned long int_status;
|
||||
int irq;
|
||||
|
||||
int_status = atlas_hw0_icregs->intstatus;
|
||||
|
||||
/* if int_status == 0, then the interrupt has already been cleared */
|
||||
if (unlikely(int_status == 0))
|
||||
return;
|
||||
|
||||
irq = ATLAS_INT_BASE + ls1bit32(int_status);
|
||||
|
||||
DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
|
||||
|
||||
do_IRQ(irq);
|
||||
}
|
||||
|
||||
static inline int clz(unsigned long x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set mips32 \n"
|
||||
" clz %0, %1 \n"
|
||||
" .set pop \n"
|
||||
: "=r" (x)
|
||||
: "r" (x));
|
||||
|
||||
return x;
|
||||
}
|
||||
|
||||
/*
|
||||
* Version of ffs that only looks at bits 12..15.
|
||||
*/
|
||||
static inline unsigned int irq_ffs(unsigned int pending)
|
||||
{
|
||||
#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
|
||||
return -clz(pending) + 31 - CAUSEB_IP;
|
||||
#else
|
||||
unsigned int a0 = 7;
|
||||
unsigned int t0;
|
||||
|
||||
t0 = s0 & 0xf000;
|
||||
t0 = t0 < 1;
|
||||
t0 = t0 << 2;
|
||||
a0 = a0 - t0;
|
||||
s0 = s0 << t0;
|
||||
|
||||
t0 = s0 & 0xc000;
|
||||
t0 = t0 < 1;
|
||||
t0 = t0 << 1;
|
||||
a0 = a0 - t0;
|
||||
s0 = s0 << t0;
|
||||
|
||||
t0 = s0 & 0x8000;
|
||||
t0 = t0 < 1;
|
||||
//t0 = t0 << 2;
|
||||
a0 = a0 - t0;
|
||||
//s0 = s0 << t0;
|
||||
|
||||
return a0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* IRQs on the Atlas board look basically like (all external interrupt
|
||||
* sources are combined together on hardware interrupt 0 (MIPS IRQ 2)):
|
||||
*
|
||||
* MIPS IRQ Source
|
||||
* -------- ------
|
||||
* 0 Software 0 (reschedule IPI on MT)
|
||||
* 1 Software 1 (remote call IPI on MT)
|
||||
* 2 Combined Atlas hardware interrupt (hw0)
|
||||
* 3 Hardware (ignored)
|
||||
* 4 Hardware (ignored)
|
||||
* 5 Hardware (ignored)
|
||||
* 6 Hardware (ignored)
|
||||
* 7 R4k timer (what we use)
|
||||
*
|
||||
* We handle the IRQ according to _our_ priority which is:
|
||||
*
|
||||
* Highest ---- R4k Timer
|
||||
* Lowest ---- Software 0
|
||||
*
|
||||
* then we just return, if multiple IRQs are pending then we will just take
|
||||
* another exception, big deal.
|
||||
*/
|
||||
asmlinkage void plat_irq_dispatch(void)
|
||||
{
|
||||
unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
|
||||
int irq;
|
||||
|
||||
irq = irq_ffs(pending);
|
||||
|
||||
if (irq == MIPSCPU_INT_ATLAS)
|
||||
atlas_hw0_irqdispatch();
|
||||
else if (irq >= 0)
|
||||
do_IRQ(MIPS_CPU_IRQ_BASE + irq);
|
||||
else
|
||||
spurious_interrupt();
|
||||
}
|
||||
|
||||
static inline void init_atlas_irqs(int base)
|
||||
{
|
||||
int i;
|
||||
|
||||
atlas_hw0_icregs = (struct atlas_ictrl_regs *)
|
||||
ioremap(ATLAS_ICTRL_REGS_BASE,
|
||||
sizeof(struct atlas_ictrl_regs *));
|
||||
|
||||
/*
|
||||
* Mask out all interrupt by writing "1" to all bit position in
|
||||
* the interrupt reset reg.
|
||||
*/
|
||||
atlas_hw0_icregs->intrsten = 0xffffffff;
|
||||
|
||||
for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++)
|
||||
set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq);
|
||||
}
|
||||
|
||||
static struct irqaction atlasirq = {
|
||||
.handler = no_action,
|
||||
.name = "Atlas cascade"
|
||||
};
|
||||
|
||||
msc_irqmap_t __initdata msc_irqmap[] = {
|
||||
{MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
|
||||
{MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
|
||||
};
|
||||
int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
|
||||
|
||||
msc_irqmap_t __initdata msc_eicirqmap[] = {
|
||||
{MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
|
||||
{MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
|
||||
{MSC01E_INT_ATLAS, MSC01_IRQ_LEVEL, 0},
|
||||
{MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
|
||||
{MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
|
||||
{MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
|
||||
{MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
|
||||
};
|
||||
int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
|
||||
|
||||
void __init arch_init_irq(void)
|
||||
{
|
||||
init_atlas_irqs(ATLAS_INT_BASE);
|
||||
|
||||
if (!cpu_has_veic)
|
||||
mips_cpu_irq_init();
|
||||
|
||||
switch(mips_revision_corid) {
|
||||
case MIPS_REVISION_CORID_CORE_MSC:
|
||||
case MIPS_REVISION_CORID_CORE_FPGA2:
|
||||
case MIPS_REVISION_CORID_CORE_FPGA3:
|
||||
case MIPS_REVISION_CORID_CORE_FPGA4:
|
||||
case MIPS_REVISION_CORID_CORE_24K:
|
||||
case MIPS_REVISION_CORID_CORE_EMUL_MSC:
|
||||
if (cpu_has_veic)
|
||||
init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
|
||||
msc_eicirqmap, msc_nr_eicirqs);
|
||||
else
|
||||
init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
|
||||
msc_irqmap, msc_nr_irqs);
|
||||
}
|
||||
|
||||
if (cpu_has_veic) {
|
||||
set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
|
||||
setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
|
||||
} else if (cpu_has_vint) {
|
||||
set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
|
||||
#ifdef CONFIG_MIPS_MT_SMTC
|
||||
setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
|
||||
&atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
|
||||
#else /* Not SMTC */
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
|
||||
#endif /* CONFIG_MIPS_MT_SMTC */
|
||||
} else
|
||||
setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
|
||||
}
|
@ -1,82 +0,0 @@
|
||||
/*
|
||||
* Carsten Langgaard, carstenl@mips.com
|
||||
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
|
||||
#include <asm/cpu.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mips-boards/generic.h>
|
||||
#include <asm/mips-boards/prom.h>
|
||||
#include <asm/mips-boards/atlas.h>
|
||||
#include <asm/mips-boards/atlasint.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/traps.h>
|
||||
|
||||
static void __init serial_init(void);
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "MIPS Atlas";
|
||||
}
|
||||
|
||||
const char display_string[] = " LINUX ON ATLAS ";
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
mips_pcibios_init();
|
||||
|
||||
ioport_resource.end = 0x7fffffff;
|
||||
|
||||
serial_init();
|
||||
|
||||
#ifdef CONFIG_KGDB
|
||||
kgdb_config();
|
||||
#endif
|
||||
mips_reboot_setup();
|
||||
}
|
||||
|
||||
static void __init serial_init(void)
|
||||
{
|
||||
#ifdef CONFIG_SERIAL_8250
|
||||
struct uart_port s;
|
||||
|
||||
memset(&s, 0, sizeof(s));
|
||||
|
||||
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||
s.iobase = ATLAS_UART_REGS_BASE;
|
||||
#else
|
||||
s.iobase = ATLAS_UART_REGS_BASE+3;
|
||||
#endif
|
||||
s.irq = ATLAS_INT_UART;
|
||||
s.uartclk = ATLAS_BASE_BAUD * 16;
|
||||
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
|
||||
s.iotype = UPIO_PORT;
|
||||
s.regshift = 3;
|
||||
|
||||
if (early_serial_setup(&s) != 0) {
|
||||
printk(KERN_ERR "Serial setup failed!\n");
|
||||
}
|
||||
#endif
|
||||
}
|
@ -22,16 +22,7 @@
|
||||
#include <linux/serial_reg.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#ifdef CONFIG_MIPS_ATLAS
|
||||
#include <asm/mips-boards/atlas.h>
|
||||
|
||||
#ifdef CONFIG_CPU_LITTLE_ENDIAN
|
||||
#define PORT(offset) (ATLAS_UART_REGS_BASE + ((offset)<<3))
|
||||
#else
|
||||
#define PORT(offset) (ATLAS_UART_REGS_BASE + 3 + ((offset)<<3))
|
||||
#endif
|
||||
|
||||
#elif defined(CONFIG_MIPS_SEAD)
|
||||
#if defined(CONFIG_MIPS_SEAD)
|
||||
|
||||
#include <asm/mips-boards/sead.h>
|
||||
|
||||
|
@ -197,14 +197,6 @@ void __init kgdb_config(void)
|
||||
while ((c = *++argptr) && ('0' <= c && c <= '9'))
|
||||
speed = speed * 10 + c - '0';
|
||||
}
|
||||
#ifdef CONFIG_MIPS_ATLAS
|
||||
if (line == 1) {
|
||||
speed = saa9730_kgdb_hook(speed);
|
||||
generic_putDebugChar = saa9730_putDebugChar;
|
||||
generic_getDebugChar = saa9730_getDebugChar;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
speed = rs_kgdb_hook(line, speed);
|
||||
generic_putDebugChar = rs_putDebugChar;
|
||||
|
@ -27,15 +27,9 @@
|
||||
#include <asm/io.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/mips-boards/generic.h>
|
||||
#if defined(CONFIG_MIPS_ATLAS)
|
||||
#include <asm/mips-boards/atlas.h>
|
||||
#endif
|
||||
|
||||
static void mips_machine_restart(char *command);
|
||||
static void mips_machine_halt(void);
|
||||
#if defined(CONFIG_MIPS_ATLAS)
|
||||
static void atlas_machine_power_off(void);
|
||||
#endif
|
||||
|
||||
static void mips_machine_restart(char *command)
|
||||
{
|
||||
@ -53,22 +47,11 @@ static void mips_machine_halt(void)
|
||||
__raw_writel(GORESET, softres_reg);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_MIPS_ATLAS)
|
||||
static void atlas_machine_power_off(void)
|
||||
{
|
||||
unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
|
||||
|
||||
writew(ATLAS_GOSTBY, psustby_reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
void mips_reboot_setup(void)
|
||||
{
|
||||
_machine_restart = mips_machine_restart;
|
||||
_machine_halt = mips_machine_halt;
|
||||
#if defined(CONFIG_MIPS_ATLAS)
|
||||
pm_power_off = atlas_machine_power_off;
|
||||
#endif
|
||||
#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_SEAD)
|
||||
pm_power_off = mips_machine_halt;
|
||||
#endif
|
||||
|
@ -42,9 +42,6 @@
|
||||
#include <asm/mips-boards/generic.h>
|
||||
#include <asm/mips-boards/prom.h>
|
||||
|
||||
#ifdef CONFIG_MIPS_ATLAS
|
||||
#include <asm/mips-boards/atlasint.h>
|
||||
#endif
|
||||
#ifdef CONFIG_MIPS_MALTA
|
||||
#include <asm/mips-boards/maltaint.h>
|
||||
#endif
|
||||
@ -89,7 +86,7 @@ static unsigned int __init estimate_cpu_frequency(void)
|
||||
else
|
||||
count = 6000000;
|
||||
#endif
|
||||
#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
|
||||
#ifdef CONFIG_MIPS_MALTA
|
||||
unsigned long flags;
|
||||
unsigned int start;
|
||||
|
||||
|
@ -21,7 +21,6 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
|
||||
#
|
||||
obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
|
||||
obj-$(CONFIG_LASAT) += pci-lasat.o
|
||||
obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
|
||||
obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
|
||||
obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
|
||||
obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
|
||||
|
@ -1,91 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
|
||||
* Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
|
||||
* Author: Maciej W. Rozycki <macro@mips.com>
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/mips-boards/atlasint.h>
|
||||
|
||||
#define PCIA ATLAS_INT_PCIA
|
||||
#define PCIB ATLAS_INT_PCIB
|
||||
#define PCIC ATLAS_INT_PCIC
|
||||
#define PCID ATLAS_INT_PCID
|
||||
#define INTA ATLAS_INT_INTA
|
||||
#define INTB ATLAS_INT_INTB
|
||||
#define ETH ATLAS_INT_ETH
|
||||
#define INTC ATLAS_INT_INTC
|
||||
#define SCSI ATLAS_INT_SCSI
|
||||
#define INTD ATLAS_INT_INTD
|
||||
|
||||
static char irq_tab[][5] __initdata = {
|
||||
/* INTA INTB INTC INTD */
|
||||
{0, 0, 0, 0, 0 }, /* 0: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 1: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 2: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 3: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 4: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 5: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 6: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 7: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 8: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 9: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 10: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 11: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 12: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 13: Unused */
|
||||
{0, 0, 0, 0, 0 }, /* 14: Unused */
|
||||
{0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
|
||||
{0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
|
||||
{0, 0, 0, 0, 0 }, /* 17: Core */
|
||||
{0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
|
||||
{0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
|
||||
{0, 0, 0, 0, 0 }, /* 20: Unused */
|
||||
{0, 0, 0, 0, 0 } /* 21: Unused */
|
||||
};
|
||||
|
||||
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
return irq_tab[slot][pin];
|
||||
}
|
||||
|
||||
/* Do platform specific device initialization at pci_enable_device() time */
|
||||
int pcibios_plat_dev_init(struct pci_dev *dev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KGDB
|
||||
/*
|
||||
* The PCI scan may have moved the saa9730 I/O address, so reread
|
||||
* the address here.
|
||||
* This does mean that it's not possible to debug the PCI bus configuration
|
||||
* code, but it is better than nothing...
|
||||
*/
|
||||
|
||||
static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
|
||||
{
|
||||
extern void *saa9730_base;
|
||||
if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
|
||||
(void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
|
||||
printk("saa9730_base = %x\n", saa9730_base);
|
||||
}
|
||||
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
|
||||
atlas_saa9730_base_fixup);
|
||||
|
||||
#endif
|
@ -1,60 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 1999, 2000, 2005 MIPS Technologies, Inc.
|
||||
* All rights reserved.
|
||||
* Authors: Carsten Langgaard <carstenl@mips.com>
|
||||
* Maciej W. Rozycki <macro@mips.com>
|
||||
* Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*/
|
||||
#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
|
||||
#define __ASM_MACH_ATLAS_MC146818RTC_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
#include <asm/mips-boards/atlas.h>
|
||||
#include <asm/mips-boards/atlasint.h>
|
||||
|
||||
#define ARCH_RTC_LOCATION
|
||||
|
||||
#define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8)
|
||||
#define RTC_IO_EXTENT 0x100
|
||||
#define RTC_IOMAPPED 0
|
||||
#define RTC_IRQ ATLAS_INT_RTC
|
||||
|
||||
static inline unsigned char CMOS_READ(unsigned long addr)
|
||||
{
|
||||
volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
|
||||
volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
|
||||
|
||||
*ireg = addr;
|
||||
return *dreg;
|
||||
}
|
||||
|
||||
static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
|
||||
{
|
||||
volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
|
||||
volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
|
||||
|
||||
*ireg = addr;
|
||||
*dreg = data;
|
||||
}
|
||||
|
||||
#define RTC_ALWAYS_BCD 0
|
||||
|
||||
#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
|
||||
|
||||
#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
|
Loading…
Reference in New Issue
Block a user