wifi: iwlwifi: mvm: read synced time from firmware if supported
If the firmware supports reading synced GP2/ATRB timestamps, read the synced timestamps from firmware instead of reading the GP2 register and the system time separately. Reading the synced time from firmware should be more accurate. Signed-off-by: Avraham Stern <avraham.stern@intel.com> Signed-off-by: Gregory Greenman <gregory.greenman@intel.com> Link: https://lore.kernel.org/r/20230320122330.a6be5f0b5580.Idedb496a5943fa496143066ffbed08185a8c4582@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2012-2014, 2018-2020 Intel Corporation
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* Copyright (C) 2012-2014, 2018-2022 Intel Corporation
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* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
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* Copyright (C) 2016-2017 Intel Deutschland GmbH
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*/
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@ -26,6 +26,11 @@ enum iwl_data_path_subcmd_ids {
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*/
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TRIGGER_RX_QUEUES_NOTIF_CMD = 0x2,
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/**
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* @WNM_PLATFORM_PTM_REQUEST_CMD: &struct iwl_time_sync_cfg_cmd
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*/
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WNM_PLATFORM_PTM_REQUEST_CMD = 0x3,
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/**
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* @STA_HE_CTXT_CMD: &struct iwl_he_sta_context_cmd
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*/
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@ -146,6 +151,48 @@ enum iwl_channel_estimation_flags {
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IWL_CHANNEL_ESTIMATION_COUNTER = BIT(2),
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};
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/**
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* enum iwl_synced_time_operation - PTM request options
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*
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* @IWL_SYNCED_TIME_OPERATION_READ_ARTB: read only the ARTB time
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* @IWL_SYNCED_TIME_OPERATION_READ_GP2: read only the GP2 time
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* @IWL_SYNCED_TIME_OPERATION_READ_BOTH: latch the ARTB and GP2 clocks and
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* provide timestamps from both clocks for the same time point
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*/
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enum iwl_synced_time_operation {
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IWL_SYNCED_TIME_OPERATION_READ_ARTB = 1,
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IWL_SYNCED_TIME_OPERATION_READ_GP2,
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IWL_SYNCED_TIME_OPERATION_READ_BOTH,
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};
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/**
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* struct iwl_synced_time_cmd - request synced GP2/ARTB timestamps
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*
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* @operation: one of &enum iwl_synced_time_operation
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*/
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struct iwl_synced_time_cmd {
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__le32 operation;
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} __packed; /* WNM_80211V_TIMING_CMD_API_S_VER_1 */
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/**
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* struct iwl_synced_time_rsp - response to iwl_synced_time_cmd
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*
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* @operation: one of &enum iwl_synced_time_operation
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* @platform_timestamp_hi: high DWORD of the ARTB clock timestamp in nanoseconds
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* @platform_timestamp_lo: low DWORD of the ARTB clock timestamp in nanoseconds
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* @gp2_timestamp_hi: high DWORD of the GP2 clock timestamp in 10's of
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* nanoseconds
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* @gp2_timestamp_lo: low DWORD of the GP2 clock timestamp in 10's of
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* nanoseconds
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*/
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struct iwl_synced_time_rsp {
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__le32 operation;
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__le32 platform_timestamp_hi;
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__le32 platform_timestamp_lo;
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__le32 gp2_timestamp_hi;
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__le32 gp2_timestamp_lo;
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} __packed; /* WNM_80211V_TIMING_RSP_API_S_VER_1 */
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/**
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* struct iwl_channel_estimation_cfg - channel estimation reporting config
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*/
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@ -455,6 +455,7 @@ enum iwl_ucode_tlv_capa {
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IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
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IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,
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IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105,
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IWL_UCODE_TLV_CAPA_SYNCED_TIME = (__force iwl_ucode_tlv_capa_t)106,
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#ifdef __CHECKER__
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/* sparse says it cannot increment the previous enum member */
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@ -23,12 +23,54 @@ static void iwl_mvm_ptp_update_new_read(struct iwl_mvm *mvm, u32 gp2)
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schedule_delayed_work(&mvm->ptp_data.dwork, IWL_PTP_WRAP_TIME);
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}
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static int
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iwl_mvm_get_crosstimestamp_fw(struct iwl_mvm *mvm, u32 *gp2, u64 *sys_time)
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{
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struct iwl_synced_time_cmd synced_time_cmd = {
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.operation = cpu_to_le32(IWL_SYNCED_TIME_OPERATION_READ_BOTH)
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};
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struct iwl_host_cmd cmd = {
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.id = WIDE_ID(DATA_PATH_GROUP, WNM_PLATFORM_PTM_REQUEST_CMD),
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.flags = CMD_WANT_SKB,
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.data[0] = &synced_time_cmd,
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.len[0] = sizeof(synced_time_cmd),
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};
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struct iwl_synced_time_rsp *resp;
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struct iwl_rx_packet *pkt;
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int ret;
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u64 gp2_10ns;
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ret = iwl_mvm_send_cmd(mvm, &cmd);
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if (ret)
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return ret;
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pkt = cmd.resp_pkt;
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if (iwl_rx_packet_payload_len(pkt) != sizeof(*resp)) {
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IWL_ERR(mvm, "PTP: Invalid command response\n");
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iwl_free_resp(&cmd);
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return -EIO;
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}
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resp = (void *)pkt->data;
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gp2_10ns = (u64)le32_to_cpu(resp->gp2_timestamp_hi) << 32 |
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le32_to_cpu(resp->gp2_timestamp_lo);
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*gp2 = gp2_10ns / 100;
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*sys_time = (u64)le32_to_cpu(resp->platform_timestamp_hi) << 32 |
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le32_to_cpu(resp->platform_timestamp_lo);
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return ret;
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}
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static int
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iwl_mvm_phc_get_crosstimestamp(struct ptp_clock_info *ptp,
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struct system_device_crosststamp *xtstamp)
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{
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struct iwl_mvm *mvm = container_of(ptp, struct iwl_mvm,
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ptp_data.ptp_clock_info);
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int ret = 0;
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/* Raw value read from GP2 register in usec */
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u32 gp2;
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/* GP2 value in ns*/
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@ -43,7 +85,16 @@ iwl_mvm_phc_get_crosstimestamp(struct ptp_clock_info *ptp,
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return -ENODEV;
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}
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iwl_mvm_get_sync_time(mvm, CLOCK_REALTIME, &gp2, NULL, &sys_time);
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mutex_lock(&mvm->mutex);
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if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SYNCED_TIME)) {
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ret = iwl_mvm_get_crosstimestamp_fw(mvm, &gp2, &sys_time);
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if (ret)
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goto out;
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} else {
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iwl_mvm_get_sync_time(mvm, CLOCK_REALTIME, &gp2, NULL,
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&sys_time);
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}
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iwl_mvm_ptp_update_new_read(mvm, gp2);
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@ -57,7 +108,9 @@ iwl_mvm_phc_get_crosstimestamp(struct ptp_clock_info *ptp,
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xtstamp->device = (ktime_t)gp2_ns;
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xtstamp->sys_realtime = sys_time;
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return 0;
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out:
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mutex_unlock(&mvm->mutex);
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return ret;
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}
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static void iwl_mvm_ptp_work(struct work_struct *wk)
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