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Merge branch 'mlx5-misc-2023-07-08-sf-max-eq'

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Saeed Mahameed says:

====================
mlx5 misc 2023-07-08 (sf max eq)

Link: https://patchwork.kernel.org/project/netdevbpf/patch/20240708080025.1593555-2-tariqt@nvidia.com/
====================

Link: https://patch.msgid.link/20240712003310.355106-1-saeed@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2024-07-13 15:44:18 -07:00
commit 22767eecd6
6 changed files with 41 additions and 12 deletions
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7
drivers/net/ethernet/mellanox/mlx5/core/eq.c
View File

@ -1187,7 +1187,6 @@ static int get_num_eqs(struct mlx5_core_dev *dev)
{
struct mlx5_eq_table *eq_table = dev->priv.eq_table;
int max_dev_eqs;
int max_eqs_sf;
int num_eqs;
/* If ethernet is disabled we use just a single completion vector to
@ -1202,7 +1201,11 @@ static int get_num_eqs(struct mlx5_core_dev *dev)
num_eqs = min_t(int, mlx5_irq_table_get_num_comp(eq_table->irq_table),
max_dev_eqs - MLX5_MAX_ASYNC_EQS);
if (mlx5_core_is_sf(dev)) {
max_eqs_sf = min_t(int, MLX5_COMP_EQS_PER_SF,
int max_eqs_sf = MLX5_CAP_GEN_2(dev, sf_eq_usage) ?
MLX5_CAP_GEN_2(dev, max_num_eqs_24b) :
MLX5_COMP_EQS_PER_SF;
max_eqs_sf = min_t(int, max_eqs_sf,
mlx5_irq_table_get_sfs_vec(eq_table->irq_table));
num_eqs = min_t(int, num_eqs, max_eqs_sf);
}

3
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
View File

@ -223,6 +223,7 @@ struct mlx5_vport {
u16 vport;
bool enabled;
bool max_eqs_set;
enum mlx5_eswitch_vport_event enabled_events;
int index;
struct mlx5_devlink_port *dl_port;
@ -579,6 +580,8 @@ int mlx5_devlink_port_fn_max_io_eqs_get(struct devlink_port *port,
int mlx5_devlink_port_fn_max_io_eqs_set(struct devlink_port *port,
u32 max_io_eqs,
struct netlink_ext_ack *extack);
int mlx5_devlink_port_fn_max_io_eqs_set_sf_default(struct devlink_port *port,
struct netlink_ext_ack *extack);
void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);

15
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
View File

@ -68,6 +68,7 @@
#define MLX5_ESW_FT_OFFLOADS_DROP_RULE (1)
#define MLX5_ESW_MAX_CTRL_EQS 4
#define MLX5_ESW_DEFAULT_SF_COMP_EQS 8
static struct esw_vport_tbl_namespace mlx5_esw_vport_tbl_mirror_ns = {
.max_fte = MLX5_ESW_VPORT_TBL_SIZE,
@ -4676,13 +4677,25 @@ mlx5_devlink_port_fn_max_io_eqs_set(struct devlink_port *port, u32 max_io_eqs,
hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
MLX5_SET(cmd_hca_cap_2, hca_caps, max_num_eqs_24b, max_eqs);
if (mlx5_esw_is_sf_vport(esw, vport_num))
MLX5_SET(cmd_hca_cap_2, hca_caps, sf_eq_usage, 1);
err = mlx5_vport_set_other_func_cap(esw->dev, hca_caps, vport_num,
MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE2);
if (err)
NL_SET_ERR_MSG_MOD(extack, "Failed setting HCA caps");
vport->max_eqs_set = true;
out:
mutex_unlock(&esw->state_lock);
kfree(query_ctx);
return err;
}
int
mlx5_devlink_port_fn_max_io_eqs_set_sf_default(struct devlink_port *port,
struct netlink_ext_ack *extack)
{
return mlx5_devlink_port_fn_max_io_eqs_set(port,
MLX5_ESW_DEFAULT_SF_COMP_EQS,
extack);
}

12
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
View File

@ -16,6 +16,7 @@
#endif
#define MLX5_SFS_PER_CTRL_IRQ 64
#define MLX5_MAX_MSIX_PER_SF 256
#define MLX5_IRQ_CTRL_SF_MAX 8
/* min num of vectors for SFs to be enabled */
#define MLX5_IRQ_VEC_COMP_BASE_SF 2
@ -589,8 +590,6 @@ static void irq_pool_free(struct mlx5_irq_pool *pool)
static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)
{
struct mlx5_irq_table *table = dev->priv.irq_table;
int num_sf_ctrl_by_msix;
int num_sf_ctrl_by_sfs;
int num_sf_ctrl;
int err;
@ -608,10 +607,8 @@ static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec)
}
/* init sf_ctrl_pool */
num_sf_ctrl_by_msix = DIV_ROUND_UP(sf_vec, MLX5_COMP_EQS_PER_SF);
num_sf_ctrl_by_sfs = DIV_ROUND_UP(mlx5_sf_max_functions(dev),
MLX5_SFS_PER_CTRL_IRQ);
num_sf_ctrl = min_t(int, num_sf_ctrl_by_msix, num_sf_ctrl_by_sfs);
num_sf_ctrl = DIV_ROUND_UP(mlx5_sf_max_functions(dev),
MLX5_SFS_PER_CTRL_IRQ);
num_sf_ctrl = min_t(int, MLX5_IRQ_CTRL_SF_MAX, num_sf_ctrl);
table->sf_ctrl_pool = irq_pool_alloc(dev, pcif_vec, num_sf_ctrl,
"mlx5_sf_ctrl",
@ -726,8 +723,7 @@ int mlx5_irq_table_create(struct mlx5_core_dev *dev)
total_vec = pcif_vec;
if (mlx5_sf_max_functions(dev))
total_vec += MLX5_IRQ_CTRL_SF_MAX +
MLX5_COMP_EQS_PER_SF * mlx5_sf_max_functions(dev);
total_vec += MLX5_MAX_MSIX_PER_SF * mlx5_sf_max_functions(dev);
total_vec = min_t(int, total_vec, pci_msix_vec_count(dev->pdev));
pcif_vec = min_t(int, pcif_vec, pci_msix_vec_count(dev->pdev));

12
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
View File

@ -161,6 +161,7 @@ int mlx5_devlink_sf_port_fn_state_get(struct devlink_port *dl_port,
static int mlx5_sf_activate(struct mlx5_core_dev *dev, struct mlx5_sf *sf,
struct netlink_ext_ack *extack)
{
struct mlx5_vport *vport;
int err;
if (mlx5_sf_is_active(sf))
@ -170,6 +171,13 @@ static int mlx5_sf_activate(struct mlx5_core_dev *dev, struct mlx5_sf *sf,
return -EBUSY;
}
vport = mlx5_devlink_port_vport_get(&sf->dl_port.dl_port);
if (!vport->max_eqs_set && MLX5_CAP_GEN_2(dev, max_num_eqs_24b)) {
err = mlx5_devlink_port_fn_max_io_eqs_set_sf_default(&sf->dl_port.dl_port,
extack);
if (err)
return err;
}
err = mlx5_cmd_sf_enable_hca(dev, sf->hw_fn_id);
if (err)
return err;
@ -318,7 +326,11 @@ int mlx5_devlink_sf_port_new(struct devlink *devlink,
static void mlx5_sf_dealloc(struct mlx5_sf_table *table, struct mlx5_sf *sf)
{
struct mlx5_vport *vport;
mutex_lock(&table->sf_state_lock);
vport = mlx5_devlink_port_vport_get(&sf->dl_port.dl_port);
vport->max_eqs_set = false;
mlx5_sf_function_id_erase(table, sf);

4
include/linux/mlx5/mlx5_ifc.h
View File

@ -1994,7 +1994,9 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {
u8 migration_tracking_state[0x1];
u8 reserved_at_ca[0x6];
u8 migration_in_chunks[0x1];
u8 reserved_at_d1[0xf];
u8 reserved_at_d1[0x1];
u8 sf_eq_usage[0x1];
u8 reserved_at_d3[0xd];
u8 cross_vhca_object_to_object_supported[0x20];