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drm/amdgpu: cleanup hw reference handling in the IB tests

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Reference should be taken when we make the assignment, not anywhere else.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2016-07-05 14:48:17 +02:00 committed by Alex Deucher
parent 0808663517
commit 22a77cf6d8
9 changed files with 7 additions and 19 deletions
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6
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
View File

@ -122,7 +122,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
bool skip_preamble, need_ctx_switch;
unsigned patch_offset = ~0;
struct amdgpu_vm *vm;
struct fence *hwf;
uint64_t ctx;
unsigned i;
@ -190,7 +189,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
if (ring->funcs->emit_hdp_invalidate)
amdgpu_ring_emit_hdp_invalidate(ring);
r = amdgpu_fence_emit(ring, &hwf);
r = amdgpu_fence_emit(ring, f);
if (r) {
dev_err(adev->dev, "failed to emit fence (%d)\n", r);
if (job && job->vm_id)
@ -205,9 +204,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
AMDGPU_FENCE_FLAG_64BIT);
}
if (f)
*f = fence_get(hwf);
if (patch_offset != ~0 && ring->funcs->patch_cond_exec)
amdgpu_ring_patch_cond_exec(ring, patch_offset);

8
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
View File

@ -172,15 +172,13 @@ static struct fence *amdgpu_job_run(struct amd_sched_job *sched_job)
trace_amdgpu_sched_run_job(job);
r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs,
job->sync.last_vm_update, job, &fence);
if (r) {
if (r)
DRM_ERROR("Error scheduling IBs (%d)\n", r);
goto err;
}
err:
/* if gpu reset, hw fence will be replaced here */
fence_put(job->fence);
job->fence = fence;
job->fence = fence_get(fence);
amdgpu_job_free_resources(job);
return fence;
}

2
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
View File

@ -968,7 +968,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring, struct amdgpu_bo *bo,
if (direct) {
r = amdgpu_ib_schedule(ring, 1, ib, NULL, NULL, &f);
job->fence = f;
job->fence = fence_get(f);
if (r)
goto err_free;

4
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
View File

@ -432,7 +432,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
ib->ptr[i] = 0x0;
r = amdgpu_ib_schedule(ring, 1, ib, NULL, NULL, &f);
job->fence = f;
job->fence = fence_get(f);
if (r)
goto err;
@ -494,7 +494,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
if (direct) {
r = amdgpu_ib_schedule(ring, 1, ib, NULL, NULL, &f);
job->fence = f;
job->fence = fence_get(f);
if (r)
goto err;

1
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
View File

@ -675,7 +675,6 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
}
err1:
fence_put(f);
amdgpu_ib_free(adev, &ib, NULL);
fence_put(f);
err0:

1
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
View File

@ -2158,7 +2158,6 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
}
err2:
fence_put(f);
amdgpu_ib_free(adev, &ib, NULL);
fence_put(f);
err1:

2
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
View File

@ -829,7 +829,6 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
r = -EINVAL;
}
err2:
fence_put(f);
amdgpu_ib_free(adev, &ib, NULL);
fence_put(f);
err1:
@ -1719,7 +1718,6 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
RREG32(sec_ded_counter_registers[i]);
fail:
fence_put(f);
amdgpu_ib_free(adev, &ib, NULL);
fence_put(f);

1
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
View File

@ -729,7 +729,6 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
}
err1:
fence_put(f);
amdgpu_ib_free(adev, &ib, NULL);
fence_put(f);
err0:

1
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
View File

@ -958,7 +958,6 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
r = -EINVAL;
}
err1:
fence_put(f);
amdgpu_ib_free(adev, &ib, NULL);
fence_put(f);
err0: