selftests/perf_events: Add a SIGTRAP stress test with disables
Add a SIGTRAP stress test that exercises repeatedly enabling/disabling an event while it concurrently keeps firing. Signed-off-by: Marco Elver <elver@google.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/all/Y0E3uG7jOywn7vy3@elver.google.com/
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@ -62,6 +62,8 @@ static struct perf_event_attr make_event_attr(bool enabled, volatile void *addr,
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.remove_on_exec = 1, /* Required by sigtrap. */
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.remove_on_exec = 1, /* Required by sigtrap. */
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.sigtrap = 1, /* Request synchronous SIGTRAP on event. */
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.sigtrap = 1, /* Request synchronous SIGTRAP on event. */
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.sig_data = TEST_SIG_DATA(addr, id),
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.sig_data = TEST_SIG_DATA(addr, id),
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.exclude_kernel = 1, /* To allow */
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.exclude_hv = 1, /* running as !root */
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};
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};
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return attr;
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return attr;
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}
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}
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@ -93,9 +95,13 @@ static void *test_thread(void *arg)
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__atomic_fetch_add(&ctx.tids_want_signal, tid, __ATOMIC_RELAXED);
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__atomic_fetch_add(&ctx.tids_want_signal, tid, __ATOMIC_RELAXED);
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iter = ctx.iterate_on; /* read */
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iter = ctx.iterate_on; /* read */
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for (i = 0; i < iter - 1; i++) {
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if (iter >= 0) {
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__atomic_fetch_add(&ctx.tids_want_signal, tid, __ATOMIC_RELAXED);
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for (i = 0; i < iter - 1; i++) {
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ctx.iterate_on = iter; /* idempotent write */
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__atomic_fetch_add(&ctx.tids_want_signal, tid, __ATOMIC_RELAXED);
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ctx.iterate_on = iter; /* idempotent write */
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}
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} else {
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while (ctx.iterate_on);
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}
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}
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return NULL;
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return NULL;
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@ -208,4 +214,27 @@ TEST_F(sigtrap_threads, signal_stress)
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EXPECT_EQ(ctx.first_siginfo.si_perf_data, TEST_SIG_DATA(&ctx.iterate_on, 0));
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EXPECT_EQ(ctx.first_siginfo.si_perf_data, TEST_SIG_DATA(&ctx.iterate_on, 0));
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}
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}
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TEST_F(sigtrap_threads, signal_stress_with_disable)
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{
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const int target_count = NUM_THREADS * 3000;
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int i;
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ctx.iterate_on = -1;
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EXPECT_EQ(ioctl(self->fd, PERF_EVENT_IOC_ENABLE, 0), 0);
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pthread_barrier_wait(&self->barrier);
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while (__atomic_load_n(&ctx.signal_count, __ATOMIC_RELAXED) < target_count) {
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EXPECT_EQ(ioctl(self->fd, PERF_EVENT_IOC_DISABLE, 0), 0);
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EXPECT_EQ(ioctl(self->fd, PERF_EVENT_IOC_ENABLE, 0), 0);
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}
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ctx.iterate_on = 0;
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for (i = 0; i < NUM_THREADS; i++)
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ASSERT_EQ(pthread_join(self->threads[i], NULL), 0);
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EXPECT_EQ(ioctl(self->fd, PERF_EVENT_IOC_DISABLE, 0), 0);
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EXPECT_EQ(ctx.first_siginfo.si_addr, &ctx.iterate_on);
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EXPECT_EQ(ctx.first_siginfo.si_perf_type, PERF_TYPE_BREAKPOINT);
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EXPECT_EQ(ctx.first_siginfo.si_perf_data, TEST_SIG_DATA(&ctx.iterate_on, 0));
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}
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TEST_HARNESS_MAIN
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TEST_HARNESS_MAIN
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