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phy: zynqmp: Only wait for PLL lock "primary" instances

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For PCIe and DisplayPort, the phy instance represents the controller's
logical lane. Wait for the instance 0 phy's PLL to lock as other
instances will never lock. We do this in xpsgtr_wait_pll_lock so callers
don't have to determine the correct lane themselves.

The original comment is wrong about cumulative wait times. Since we are
just polling a bit, all subsequent waiters will finish immediately.

Signed-off-by: Sean Anderson <sean.anderson@linux.dev>
Link: https://lore.kernel.org/r/20240628205540.3098010-4-sean.anderson@linux.dev
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Sean Anderson 2024-06-28 16:55:38 -04:00 committed by Vinod Koul
parent 6959d2367b
commit 235d8b663a
1 changed files with 21 additions and 9 deletions
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30
drivers/phy/xilinx/phy-zynqmp.c
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@ -294,10 +294,30 @@ static int xpsgtr_wait_pll_lock(struct phy *phy)
struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy); struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
struct xpsgtr_dev *gtr_dev = gtr_phy->dev; struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
unsigned int timeout = TIMEOUT_US; unsigned int timeout = TIMEOUT_US;
u8 protocol = gtr_phy->protocol;
int ret; int ret;
dev_dbg(gtr_dev->dev, "Waiting for PLL lock\n"); dev_dbg(gtr_dev->dev, "Waiting for PLL lock\n");
/*
* For DP and PCIe, only the instance 0 PLL is used. Switch to that phy
* so we wait on the right PLL.
*/
if ((protocol == ICM_PROTOCOL_DP || protocol == ICM_PROTOCOL_PCIE) &&
gtr_phy->instance) {
int i;
for (i = 0; i < NUM_LANES; i++) {
gtr_phy = &gtr_dev->phys[i];
if (gtr_phy->protocol == protocol && !gtr_phy->instance)
goto got_phy;
}
return -EBUSY;
}
got_phy:
while (1) { while (1) {
u32 reg = xpsgtr_read_phy(gtr_phy, L0_PLL_STATUS_READ_1); u32 reg = xpsgtr_read_phy(gtr_phy, L0_PLL_STATUS_READ_1);
@ -625,15 +645,7 @@ static int xpsgtr_phy_power_on(struct phy *phy)
/* Skip initialization if not required. */ /* Skip initialization if not required. */
if (!xpsgtr_phy_init_required(gtr_phy)) if (!xpsgtr_phy_init_required(gtr_phy))
return ret; return ret;
/* return xpsgtr_wait_pll_lock(phy);
* Wait for the PLL to lock. For DP, only wait on DP0 to avoid
* cumulating waits for both lanes. The user is expected to initialize
* lane 0 last.
*/
if (gtr_phy->protocol != ICM_PROTOCOL_DP || !gtr_phy->instance)
ret = xpsgtr_wait_pll_lock(phy);
return ret;
} }
static int xpsgtr_phy_configure(struct phy *phy, union phy_configure_opts *opts) static int xpsgtr_phy_configure(struct phy *phy, union phy_configure_opts *opts)