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Merge branches 'pm-cpufreq', 'powercap' and 'pm-tools'

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* pm-cpufreq:
  cpufreq: intel_pstate: Fix an annoying !CONFIG_SMP warning
  intel_pstate: Change the setpoint for Atom params

* powercap:
  powercap / RAPL: Add support for Intel Skylake processors

* pm-tools:
  cpupower: fix breakage from libpci API change
This commit is contained in:
Rafael J. Wysocki 2015-04-19 21:19:27 +02:00
commit 2363ccb505
3 changed files with 17 additions and 9 deletions
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14
drivers/cpufreq/intel_pstate.c
View File

@ -31,6 +31,7 @@
#include <asm/div64.h>
#include <asm/msr.h>
#include <asm/cpu_device_id.h>
#include <asm/cpufeature.h>
#define BYT_RATIOS 0x66a
#define BYT_VIDS 0x66b
@ -649,7 +650,7 @@ static struct cpu_defaults byt_params = {
.pid_policy = {
.sample_rate_ms = 10,
.deadband = 0,
.setpoint = 97,
.setpoint = 60,
.p_gain_pct = 14,
.d_gain_pct = 0,
.i_gain_pct = 4,
@ -1200,8 +1201,7 @@ static int __init intel_pstate_init(void)
{
int cpu, rc = 0;
const struct x86_cpu_id *id;
struct cpu_defaults *cpu_info;
struct cpuinfo_x86 *c = &boot_cpu_data;
struct cpu_defaults *cpu_def;
if (no_load)
return -ENODEV;
@ -1217,10 +1217,10 @@ static int __init intel_pstate_init(void)
if (intel_pstate_platform_pwr_mgmt_exists())
return -ENODEV;
cpu_info = (struct cpu_defaults *)id->driver_data;
cpu_def = (struct cpu_defaults *)id->driver_data;
copy_pid_params(&cpu_info->pid_policy);
copy_cpu_funcs(&cpu_info->funcs);
copy_pid_params(&cpu_def->pid_policy);
copy_cpu_funcs(&cpu_def->funcs);
if (intel_pstate_msrs_not_valid())
return -ENODEV;
@ -1231,7 +1231,7 @@ static int __init intel_pstate_init(void)
if (!all_cpu_data)
return -ENOMEM;
if (cpu_has(c,X86_FEATURE_HWP) && !no_hwp)
if (static_cpu_has_safe(X86_FEATURE_HWP) && !no_hwp)
intel_pstate_hwp_enable();
if (!hwp_active && hwp_only)

1
drivers/powercap/intel_rapl.c
View File

@ -1064,6 +1064,7 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */
RAPL_CPU(0x4f, rapl_defaults_hsw_server),/* Broadwell servers */
RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */
RAPL_CPU(0x4E, rapl_defaults_core),/* Skylake */
RAPL_CPU(0x4C, rapl_defaults_atom),/* Braswell */
RAPL_CPU(0x4A, rapl_defaults_atom),/* Tangier */
RAPL_CPU(0x56, rapl_defaults_core),/* Future Xeon */

11
tools/power/cpupower/utils/helpers/pci.c
View File

@ -25,14 +25,21 @@
struct pci_dev *pci_acc_init(struct pci_access **pacc, int domain, int bus,
int slot, int func, int vendor, int dev)
{
struct pci_filter filter_nb_link = { domain, bus, slot, func,
vendor, dev };
struct pci_filter filter_nb_link;
struct pci_dev *device;
*pacc = pci_alloc();
if (*pacc == NULL)
return NULL;
pci_filter_init(*pacc, &filter_nb_link);
filter_nb_link.domain = domain;
filter_nb_link.bus = bus;
filter_nb_link.slot = slot;
filter_nb_link.func = func;
filter_nb_link.vendor = vendor;
filter_nb_link.device = dev;
pci_init(*pacc);
pci_scan_bus(*pacc);