drm/i915: Fix SEL_FETCH_PLANE_*(PIPE_B+) register addresses
commit 4ae4dd2e26fdfebf0b8c6af6c325383eadfefdb4 upstream. Fix typo in the _SEL_FETCH_PLANE_BASE_1_B register base address. Fixes: a5523e2ff074a5 ("drm/i915: Add PSR2 selective fetch registers") References: https://gitlab.freedesktop.org/drm/intel/-/issues/5400 Cc: José Roberto de Souza <jose.souza@intel.com> Cc: <stable@vger.kernel.org> # v5.9+ Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220421162221.2261895-1-imre.deak@intel.com (cherry picked from commit af2cbc6ef967f61711a3c40fca5366ea0bc7fecc) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -7202,7 +7202,7 @@ enum {
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#define _SEL_FETCH_PLANE_BASE_6_A 0x70940
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#define _SEL_FETCH_PLANE_BASE_7_A 0x70960
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#define _SEL_FETCH_PLANE_BASE_CUR_A 0x70880
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#define _SEL_FETCH_PLANE_BASE_1_B 0x70990
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#define _SEL_FETCH_PLANE_BASE_1_B 0x71890
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#define _SEL_FETCH_PLANE_BASE_A(plane) _PICK(plane, \
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_SEL_FETCH_PLANE_BASE_1_A, \
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