dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs
GPLL0 has two separate outputs to both GPUSS and MMSS: one that's 2-divided and one that runs at the same rate as the GPLL0 itself. Add the missing ones to the binding. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230622-topic-8998clk-v2-1-6222fbc2916b@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -190,6 +190,9 @@
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#define AGGRE2_SNOC_NORTH_AXI 181
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#define SSC_XO 182
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#define SSC_CNOC_AHBS_CLK 183
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#define GCC_MMSS_GPLL0_DIV_CLK 184
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#define GCC_GPU_GPLL0_DIV_CLK 185
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#define GCC_GPU_GPLL0_CLK 186
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#define PCIE_0_GDSC 0
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#define UFS_GDSC 1
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