pinctrl: dra: dt-bindings: Fix pull enable/disable
The DRA74/72 control module pins have a weak pull up and pull down. This is configured by bit offset 17. if BIT(17) is 1, a pull up is selected, else a pull down is selected. However, this pull resisstor is applied based on BIT(16) - PULLUDENABLE - if BIT(18) is *0*, then pull as defined in BIT(17) is applied, else no weak pulls are applied. We defined this in reverse. Reference: Table 18-5 (Description of the pad configuration register bits) in Technical Reference Manual Revision (DRA74x revision Q: SPRUHI2Q Revised June 2014 and DRA72x revision F: SPRUHP2F - Revised June 2014) Fixes: 6e58b8f1daaf1a ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board") Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Felipe Balbi <balbi@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -30,7 +30,8 @@
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#define MUX_MODE14 0xe
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#define MUX_MODE14 0xe
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#define MUX_MODE15 0xf
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#define MUX_MODE15 0xf
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#define PULL_ENA (1 << 16)
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#define PULL_ENA (0 << 16)
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#define PULL_DIS (1 << 16)
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#define PULL_UP (1 << 17)
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#define PULL_UP (1 << 17)
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#define INPUT_EN (1 << 18)
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#define INPUT_EN (1 << 18)
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#define SLEWCONTROL (1 << 19)
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#define SLEWCONTROL (1 << 19)
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@ -38,10 +39,10 @@
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#define WAKEUP_EVENT (1 << 25)
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#define WAKEUP_EVENT (1 << 25)
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/* Active pin states */
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/* Active pin states */
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#define PIN_OUTPUT 0
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#define PIN_OUTPUT (0 | PULL_DIS)
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#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
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#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
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#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
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#define PIN_INPUT INPUT_EN
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#define PIN_INPUT (INPUT_EN | PULL_DIS)
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#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
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#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
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#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
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#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
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#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
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