drm/i915|intel-gtt: consolidate intel-gtt.h headers
... and a few other defines. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -24,7 +24,6 @@
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#include <asm/smp.h>
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#include "agp.h"
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#include "intel-agp.h"
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#include <linux/intel-gtt.h>
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#include <drm/intel-gtt.h>
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/*
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@ -39,10 +38,6 @@
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#define USE_PCI_DMA_API 0
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#endif
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#define AGP_DCACHE_MEMORY 1
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#define AGP_PHYS_MEMORY 2
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#define INTEL_AGP_CACHED_MEMORY 3
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struct intel_gtt_driver {
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unsigned int gen : 8;
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unsigned int is_g33 : 1;
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@ -34,7 +34,6 @@
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#include <linux/slab.h>
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#include <linux/swap.h>
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#include <linux/pci.h>
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#include <linux/intel-gtt.h>
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struct change_domains {
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uint32_t invalidate_domains;
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@ -13,5 +13,17 @@ const struct intel_gtt {
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unsigned int gtt_mappable_entries;
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} *intel_gtt_get(void);
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/* Special gtt memory types */
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#define AGP_DCACHE_MEMORY 1
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#define AGP_PHYS_MEMORY 2
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/* New caching attributes for gen6/sandybridge */
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#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
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#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
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/* flag for GFDT type */
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#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
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#endif
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@ -1,20 +0,0 @@
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/*
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* Common Intel AGPGART and GTT definitions.
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*/
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#ifndef _INTEL_GTT_H
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#define _INTEL_GTT_H
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#include <linux/agp_backend.h>
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/* This is for Intel only GTT controls.
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*
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* Sandybridge: AGP_USER_CACHED_MEMORY default to LLC only
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*/
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#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
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#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
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/* flag for GFDT type */
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#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
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#endif
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