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drm/i915/ipc: refactor and rename IPC functions

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Rename the IPC functions to have skl_watermark_ipc_ prefix, rename
enable to update to reflect what the function actually does, and add
enabled function to abstract direct ->ipc_enabled access for state
query.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/536237d5bc919e8c97a96796f235f5bb264ceff2.1662983005.git.jani.nikula@intel.com
This commit is contained in:
Jani Nikula 2022-09-12 14:45:12 +03:00
parent 4ff0856db0
commit 23fbdb07d6
5 changed files with 24 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/i915/display/intel_display.c
View File

@ -4779,7 +4779,7 @@ static u16 skl_linetime_wm(const struct intel_crtc_state *crtc_state)
/* Display WA #1135: BXT:ALL GLK:ALL */
if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) &&
dev_priv->ipc_enabled)
skl_watermark_ipc_enabled(dev_priv))
linetime_wm /= 2;
return min(linetime_wm, 0x1ff);
@ -8782,7 +8782,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
intel_hpd_init(i915);
intel_hpd_poll_disable(i915);
intel_init_ipc(i915);
skl_watermark_ipc_init(i915);
return 0;
}
@ -8913,7 +8913,7 @@ void intel_display_resume(struct drm_device *dev)
if (!ret)
ret = __intel_display_resume(i915, state, &ctx);
intel_enable_ipc(i915);
skl_watermark_ipc_update(i915);
drm_modeset_drop_locks(&ctx);
drm_modeset_acquire_fini(&ctx);

6
drivers/gpu/drm/i915/display/intel_display_debugfs.c
View File

@ -988,7 +988,7 @@ static int i915_ipc_status_show(struct seq_file *m, void *data)
struct drm_i915_private *dev_priv = m->private;
seq_printf(m, "Isochronous Priority Control: %s\n",
str_yes_no(dev_priv->ipc_enabled));
str_yes_no(skl_watermark_ipc_enabled(dev_priv)));
return 0;
}
@ -1016,11 +1016,11 @@ static ssize_t i915_ipc_status_write(struct file *file, const char __user *ubuf,
return ret;
with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) {
if (!dev_priv->ipc_enabled && enable)
if (!skl_watermark_ipc_enabled(dev_priv) && enable)
drm_info(&dev_priv->drm,
"Enabling IPC: WM will be proper only after next commit\n");
dev_priv->ipc_enabled = enable;
intel_enable_ipc(dev_priv);
skl_watermark_ipc_update(dev_priv);
}
return len;

25
drivers/gpu/drm/i915/display/skl_watermark.c
View File

@ -1843,10 +1843,8 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
* WaIncreaseLatencyIPCEnabled: kbl,cfl
* Display WA #1141: kbl,cfl
*/
if ((IS_KABYLAKE(i915) ||
IS_COFFEELAKE(i915) ||
IS_COMETLAKE(i915)) &&
i915->ipc_enabled)
if ((IS_KABYLAKE(i915) || IS_COFFEELAKE(i915) || IS_COMETLAKE(i915)) &&
skl_watermark_ipc_enabled(i915))
latency += 4;
if (skl_needs_memory_bw_wa(i915) && wp->x_tiled)
@ -2014,7 +2012,7 @@ static void skl_compute_transition_wm(struct drm_i915_private *i915,
u16 wm0_blocks, trans_offset, blocks;
/* Transition WM don't make any sense if ipc is disabled */
if (!i915->ipc_enabled)
if (!skl_watermark_ipc_enabled(i915))
return;
/*
@ -3122,7 +3120,12 @@ void intel_wm_state_verify(struct intel_crtc *crtc,
kfree(hw);
}
void intel_enable_ipc(struct drm_i915_private *i915)
bool skl_watermark_ipc_enabled(struct drm_i915_private *i915)
{
return i915->ipc_enabled;
}
void skl_watermark_ipc_update(struct drm_i915_private *i915)
{
u32 val;
@ -3131,7 +3134,7 @@ void intel_enable_ipc(struct drm_i915_private *i915)
val = intel_uncore_read(&i915->uncore, DISP_ARB_CTL2);
if (i915->ipc_enabled)
if (skl_watermark_ipc_enabled(i915))
val |= DISP_IPC_ENABLE;
else
val &= ~DISP_IPC_ENABLE;
@ -3139,7 +3142,7 @@ void intel_enable_ipc(struct drm_i915_private *i915)
intel_uncore_write(&i915->uncore, DISP_ARB_CTL2, val);
}
static bool intel_can_enable_ipc(struct drm_i915_private *i915)
static bool skl_watermark_ipc_can_enable(struct drm_i915_private *i915)
{
/* Display WA #0477 WaDisableIPC: skl */
if (IS_SKYLAKE(i915))
@ -3154,14 +3157,14 @@ static bool intel_can_enable_ipc(struct drm_i915_private *i915)
return true;
}
void intel_init_ipc(struct drm_i915_private *i915)
void skl_watermark_ipc_init(struct drm_i915_private *i915)
{
if (!HAS_IPC(i915))
return;
i915->ipc_enabled = intel_can_enable_ipc(i915);
i915->ipc_enabled = skl_watermark_ipc_can_enable(i915);
intel_enable_ipc(i915);
skl_watermark_ipc_update(i915);
}
static void

5
drivers/gpu/drm/i915/display/skl_watermark.h
View File

@ -44,8 +44,9 @@ void skl_wm_sanitize(struct drm_i915_private *i915);
void intel_wm_state_verify(struct intel_crtc *crtc,
struct intel_crtc_state *new_crtc_state);
void intel_enable_ipc(struct drm_i915_private *i915);
void intel_init_ipc(struct drm_i915_private *i915);
void skl_watermark_ipc_init(struct drm_i915_private *i915);
void skl_watermark_ipc_update(struct drm_i915_private *i915);
bool skl_watermark_ipc_enabled(struct drm_i915_private *i915);
void skl_wm_init(struct drm_i915_private *i915);

2
drivers/gpu/drm/i915/i915_driver.c
View File

@ -1713,7 +1713,7 @@ static int intel_runtime_resume(struct device *kdev)
intel_hpd_poll_disable(dev_priv);
}
intel_enable_ipc(dev_priv);
skl_watermark_ipc_update(dev_priv);
enable_rpm_wakeref_asserts(rpm);