drm/radeon: don't reset the MC on IGPs/APUs
The MC isn't part of the GPU per se. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2500,8 +2500,10 @@ static void evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
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if (reset_mask & RADEON_RESET_VMC)
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srbm_soft_reset |= SOFT_RESET_VMC;
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if (reset_mask & RADEON_RESET_MC)
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srbm_soft_reset |= SOFT_RESET_MC;
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if (!(rdev->flags & RADEON_IS_IGP)) {
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if (reset_mask & RADEON_RESET_MC)
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srbm_soft_reset |= SOFT_RESET_MC;
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}
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if (grbm_soft_reset) {
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tmp = RREG32(GRBM_SOFT_RESET);
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@ -1474,8 +1474,10 @@ static void cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
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if (reset_mask & RADEON_RESET_VMC)
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srbm_soft_reset |= SOFT_RESET_VMC;
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if (reset_mask & RADEON_RESET_MC)
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srbm_soft_reset |= SOFT_RESET_MC;
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if (!(rdev->flags & RADEON_IS_IGP)) {
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if (reset_mask & RADEON_RESET_MC)
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srbm_soft_reset |= SOFT_RESET_MC;
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}
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if (grbm_soft_reset) {
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tmp = RREG32(GRBM_SOFT_RESET);
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@ -1475,8 +1475,10 @@ static void r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
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if (reset_mask & RADEON_RESET_GRBM)
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srbm_soft_reset |= S_000E60_SOFT_RESET_GRBM(1);
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if (reset_mask & RADEON_RESET_MC)
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srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1);
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if (!(rdev->flags & RADEON_IS_IGP)) {
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if (reset_mask & RADEON_RESET_MC)
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srbm_soft_reset |= S_000E60_SOFT_RESET_MC(1);
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}
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if (reset_mask & RADEON_RESET_VMC)
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srbm_soft_reset |= S_000E60_SOFT_RESET_VMC(1);
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