arm64: dts: qcom: sc7180: Add nodes for eMMC and SD card
Add sdhc instances for supporting eMMC and SD-card on sc7180. The regulators should be in HPM state for proper functionality of eMMC and SD-card. Updating corresponding regulators accordingly. Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org> Link: https://lore.kernel.org/r/1578495250-10672-1-git-send-email-sbhanu@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
parent
e83291d9d6
commit
24254a8edf
@ -7,6 +7,7 @@
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
|
||||
#include "sc7180.dtsi"
|
||||
#include "pm6150.dtsi"
|
||||
@ -102,9 +103,9 @@
|
||||
};
|
||||
|
||||
vreg_l12a_1p8: ldo12 {
|
||||
regulator-min-microvolt = <1696000>;
|
||||
regulator-max-microvolt = <1952000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
};
|
||||
|
||||
vreg_l13a_1p8: ldo13 {
|
||||
@ -144,9 +145,9 @@
|
||||
};
|
||||
|
||||
vreg_l19a_2p9: ldo19 {
|
||||
regulator-min-microvolt = <2696000>;
|
||||
regulator-max-microvolt = <3304000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
regulator-min-microvolt = <2960000>;
|
||||
regulator-max-microvolt = <2960000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
};
|
||||
};
|
||||
|
||||
@ -190,9 +191,9 @@
|
||||
};
|
||||
|
||||
vreg_l6c_2p9: ldo6 {
|
||||
regulator-min-microvolt = <2696000>;
|
||||
regulator-max-microvolt = <3304000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <2950000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
};
|
||||
|
||||
vreg_l7c_3p0: ldo7 {
|
||||
@ -208,9 +209,9 @@
|
||||
};
|
||||
|
||||
vreg_l9c_2p9: ldo9 {
|
||||
regulator-min-microvolt = <2952000>;
|
||||
regulator-max-microvolt = <3304000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
|
||||
regulator-min-microvolt = <2960000>;
|
||||
regulator-max-microvolt = <2960000>;
|
||||
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
|
||||
};
|
||||
|
||||
vreg_l10c_3p3: ldo10 {
|
||||
@ -255,6 +256,28 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhc_1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&sdc1_on>;
|
||||
pinctrl-1 = <&sdc1_off>;
|
||||
vmmc-supply = <&vreg_l19a_2p9>;
|
||||
vqmmc-supply = <&vreg_l12a_1p8>;
|
||||
};
|
||||
|
||||
&sdhc_2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default","sleep";
|
||||
pinctrl-0 = <&sdc2_on>;
|
||||
pinctrl-1 = <&sdc2_off>;
|
||||
vmmc-supply = <&vreg_l9c_2p9>;
|
||||
vqmmc-supply = <&vreg_l6c_2p9>;
|
||||
|
||||
cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
|
||||
|
@ -330,6 +330,33 @@
|
||||
};
|
||||
};
|
||||
|
||||
sdhc_1: sdhci@7c4000 {
|
||||
compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
|
||||
reg = <0 0x7c4000 0 0x1000>,
|
||||
<0 0x07c5000 0 0x1000>;
|
||||
reg-names = "hc_mem", "cqhci_mem";
|
||||
|
||||
iommus = <&apps_smmu 0x60 0x0>;
|
||||
interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "hc_irq", "pwr_irq";
|
||||
|
||||
clocks = <&gcc GCC_SDCC1_APPS_CLK>,
|
||||
<&gcc GCC_SDCC1_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
supports-cqe;
|
||||
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs200-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qupv3_id_0: geniqup@8c0000 {
|
||||
compatible = "qcom,geni-se-qup";
|
||||
reg = <0 0x008c0000 0 0x6000>;
|
||||
@ -1040,6 +1067,127 @@
|
||||
function = "qup15";
|
||||
};
|
||||
};
|
||||
|
||||
sdc1_on: sdc1-on {
|
||||
pinconf-clk {
|
||||
pins = "sdc1_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
|
||||
pinconf-cmd {
|
||||
pins = "sdc1_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
pinconf-data {
|
||||
pins = "sdc1_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
pinconf-rclk {
|
||||
pins = "sdc1_rclk";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
sdc1_off: sdc1-off {
|
||||
pinconf-clk {
|
||||
pins = "sdc1_clk";
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf-cmd {
|
||||
pins = "sdc1_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf-data {
|
||||
pins = "sdc1_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf-rclk {
|
||||
pins = "sdc1_rclk";
|
||||
bias-pull-down;
|
||||
};
|
||||
};
|
||||
|
||||
sdc2_on: sdc2-on {
|
||||
pinconf-clk {
|
||||
pins = "sdc2_clk";
|
||||
bias-disable;
|
||||
drive-strength = <16>;
|
||||
};
|
||||
|
||||
pinconf-cmd {
|
||||
pins = "sdc2_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
pinconf-data {
|
||||
pins = "sdc2_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <10>;
|
||||
};
|
||||
|
||||
pinconf-sd-cd {
|
||||
pins = "gpio69";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
sdc2_off: sdc2-off {
|
||||
pinconf-clk {
|
||||
pins = "sdc2_clk";
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf-cmd {
|
||||
pins = "sdc2_cmd";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf-data {
|
||||
pins = "sdc2_data";
|
||||
bias-pull-up;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
|
||||
pinconf-sd-cd {
|
||||
pins = "gpio69";
|
||||
bias-disable;
|
||||
drive-strength = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sdhc_2: sdhci@8804000 {
|
||||
compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
|
||||
reg = <0 0x08804000 0 0x1000>;
|
||||
reg-names = "hc_mem";
|
||||
|
||||
iommus = <&apps_smmu 0x80 0>;
|
||||
interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "hc_irq", "pwr_irq";
|
||||
|
||||
clocks = <&gcc GCC_SDCC2_APPS_CLK>,
|
||||
<&gcc GCC_SDCC2_AHB_CLK>;
|
||||
clock-names = "core", "iface";
|
||||
|
||||
bus-width = <4>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
qspi: spi@88dc000 {
|
||||
|
Loading…
x
Reference in New Issue
Block a user