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irqchip updates for 4.18, take #3

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- DT binding updates for Renesas r8a77470 and r8a77980 SoCs
 - DT binding update for Ingenic JZ4725B SoC
 - Fix stm32mp1's exti0 pin routing
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAltQq5gVHG1hcmMuenlu
 Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDti4QAJpsSCe0utUD0TFC16zeRW4zxPW4
 D26t5hpz1jLSCDWnEX3d28XSHcIr6HaBuO2/5U6wDyVLKy0vl3BD8kuR1NRGtMSJ
 j+vbTGlUPpLBojWoG+JIUFMq8kHXkG1aiGnBzzBVclwX/3+rZciJy+wSe1zsWF0M
 xXMSh4GlZpVvAoTwkPloyc4fSxDBJrnXLK95dY9ioo/g9lghiYi98H8IMUGy1BXl
 auAUtmBoS8O34ahNkuqI9MPUVeg6sjj6VUNPAvUSXn/KGsxzW5K7OjYV89Bu4gul
 DPHCeql6UgUwl0cPaOU83do7Ham2su2SWngXJfi0zJ9Ac1J1P9EbszP5FVPhnWFo
 g8R7Q6rfRH9Dfm9v3rwe24tGpqR65l46tRC/sc24GcEsjfYvlYaS7g1qq6mSwMXo
 J0Pt4Aq09CAyIl7wDugAQ5/b83zS/GV5pB1cSXsUKEZr55QQxvTi9bAf/w7ZbUPI
 9//IV+DuWlbzZZ6RFmbdC+e0xPP/PR+pCQEF8h4kw6IVPrGcohYuD6PUDLKH4JCY
 Yl/BaA3bvj6ujAsGdH4uabkCtCMOhLc2mljcolSeMCQoXeSqWTdZQS4FSPzZMLuU
 /grBvt9oGDbsQxLEwWYxPDU8fxu7C3NYCD1E1N10PyuizLCdU/0m9wDXaYLlMngW
 nmBurESRnSAy24OQ
 =lJ5r
 -----END PGP SIGNATURE-----

Merge tag 'irqchip-4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core

Pull irqchip updates for 4.18, take #3 from Marc Zyngier

 - DT binding updates for Renesas r8a77470 and r8a77980 SoCs
 - DT binding update for Ingenic JZ4725B SoC
 - Fix stm32mp1's exti0 pin routing
This commit is contained in:
Thomas Gleixner 2018-07-19 18:16:01 +02:00
commit 246b6472b7
4 changed files with 5 additions and 0 deletions
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1
Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
View File

@ -4,6 +4,7 @@ Required properties:
- compatible : should be "ingenic,<socname>-intc". Valid strings are:
ingenic,jz4740-intc
ingenic,jz4725b-intc
ingenic,jz4770-intc
ingenic,jz4775-intc
ingenic,jz4780-intc

2
Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.txt
View File

@ -7,6 +7,7 @@ Required properties:
- "renesas,irqc-r8a73a4" (R-Mobile APE6)
- "renesas,irqc-r8a7743" (RZ/G1M)
- "renesas,irqc-r8a7745" (RZ/G1E)
- "renesas,irqc-r8a77470" (RZ/G1C)
- "renesas,irqc-r8a7790" (R-Car H2)
- "renesas,irqc-r8a7791" (R-Car M2-W)
- "renesas,irqc-r8a7792" (R-Car V2H)
@ -16,6 +17,7 @@ Required properties:
- "renesas,intc-ex-r8a7796" (R-Car M3-W)
- "renesas,intc-ex-r8a77965" (R-Car M3-N)
- "renesas,intc-ex-r8a77970" (R-Car V3M)
- "renesas,intc-ex-r8a77980" (R-Car V3H)
- "renesas,intc-ex-r8a77995" (R-Car D3)
- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
interrupts.txt in this directory

1
drivers/irqchip/irq-ingenic.c
View File

@ -165,6 +165,7 @@ static int __init intc_1chip_of_init(struct device_node *node,
return ingenic_intc_of_init(node, 1);
}
IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", intc_1chip_of_init);
IRQCHIP_DECLARE(jz4725b_intc, "ingenic,jz4725b-intc", intc_1chip_of_init);
static int __init intc_2chip_of_init(struct device_node *node,
struct device_node *parent)

1
drivers/irqchip/irq-stm32-exti.c
View File

@ -159,6 +159,7 @@ static const struct stm32_exti_bank *stm32mp1_exti_banks[] = {
};
static const struct stm32_desc_irq stm32mp1_desc_irq[] = {
{ .exti = 0, .irq_parent = 6 },
{ .exti = 1, .irq_parent = 7 },
{ .exti = 2, .irq_parent = 8 },
{ .exti = 3, .irq_parent = 9 },