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drm/i915/gt: Tweak flushes around ivb ppgtt

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A small tweak to flush then invalidate appears to improve the
reliability of ppGTT switches on Ivybridge -- but does not improve
hsw/vlv bcs reliability.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191231120857.4014900-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2019-12-31 12:08:57 +00:00
parent 2b64e616d5
commit 24c66274e7
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/i915/gt/intel_ring_submission.c
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@ -1394,7 +1394,7 @@ static int load_pd_dir(struct i915_request *rq,
intel_ring_advance(rq, cs);
return 0;
return rq->engine->emit_flush(rq, EMIT_FLUSH);
}
static inline int mi_set_context(struct i915_request *rq, u32 flags)
@ -1584,7 +1584,7 @@ static int switch_mm(struct i915_request *rq, struct i915_address_space *vm)
if (ret)
return ret;
return rq->engine->emit_flush(rq, EMIT_FLUSH);
return rq->engine->emit_flush(rq, EMIT_INVALIDATE);
}
static int switch_context(struct i915_request *rq)