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hwrng: iproc-rng200 - Move enable/disable in separate function

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We are calling the same code for enable and disable the block in various
parts of the driver. Put that code into a new function to reduce code
duplication.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Matthias Brugger 2020-12-18 11:57:08 +01:00 committed by Herbert Xu
parent 96a6af5403
commit 256693a362
1 changed files with 17 additions and 20 deletions
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37
drivers/char/hw_random/iproc-rng200.c
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@ -53,14 +53,24 @@ struct iproc_rng200_dev {
#define to_rng_priv(rng) container_of(rng, struct iproc_rng200_dev, rng) #define to_rng_priv(rng) container_of(rng, struct iproc_rng200_dev, rng)
static void iproc_rng200_enable_set(void __iomem *rng_base, bool enable)
{
u32 val;
val = ioread32(rng_base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
if (enable)
val |= RNG_CTRL_RNG_RBGEN_ENABLE;
iowrite32(val, rng_base + RNG_CTRL_OFFSET);
}
static void iproc_rng200_restart(void __iomem *rng_base) static void iproc_rng200_restart(void __iomem *rng_base)
{ {
uint32_t val; uint32_t val;
/* Disable RBG */ iproc_rng200_enable_set(rng_base, false);
val = ioread32(rng_base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
iowrite32(val, rng_base + RNG_CTRL_OFFSET);
/* Clear all interrupt status */ /* Clear all interrupt status */
iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET); iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
@ -82,11 +92,7 @@ static void iproc_rng200_restart(void __iomem *rng_base)
val &= ~RBG_SOFT_RESET; val &= ~RBG_SOFT_RESET;
iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET); iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
/* Enable RBG */ iproc_rng200_enable_set(rng_base, true);
val = ioread32(rng_base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
val |= RNG_CTRL_RNG_RBGEN_ENABLE;
iowrite32(val, rng_base + RNG_CTRL_OFFSET);
} }
static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max, static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max,
@ -153,13 +159,8 @@ static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max,
static int iproc_rng200_init(struct hwrng *rng) static int iproc_rng200_init(struct hwrng *rng)
{ {
struct iproc_rng200_dev *priv = to_rng_priv(rng); struct iproc_rng200_dev *priv = to_rng_priv(rng);
uint32_t val;
/* Setup RNG. */ iproc_rng200_enable_set(priv->base, true);
val = ioread32(priv->base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
val |= RNG_CTRL_RNG_RBGEN_ENABLE;
iowrite32(val, priv->base + RNG_CTRL_OFFSET);
return 0; return 0;
} }
@ -167,12 +168,8 @@ static int iproc_rng200_init(struct hwrng *rng)
static void iproc_rng200_cleanup(struct hwrng *rng) static void iproc_rng200_cleanup(struct hwrng *rng)
{ {
struct iproc_rng200_dev *priv = to_rng_priv(rng); struct iproc_rng200_dev *priv = to_rng_priv(rng);
uint32_t val;
/* Disable RNG hardware */ iproc_rng200_enable_set(priv->base, false);
val = ioread32(priv->base + RNG_CTRL_OFFSET);
val &= ~RNG_CTRL_RNG_RBGEN_MASK;
iowrite32(val, priv->base + RNG_CTRL_OFFSET);
} }
static int iproc_rng200_probe(struct platform_device *pdev) static int iproc_rng200_probe(struct platform_device *pdev)