drm/radeon/kms: balance asic_reset functions
First, we were calling mc_stop() at the top of the function which turns off all MC (memory controller) clients, then checking if the GPU is idle. If it was idle we returned without re-enabling the MC clients which would lead to a blank screen, etc. This patch checks if the GPU is idle before calling mc_stop(). Second, if the reset failed, we were returning without re-enabling the MC clients. This patch re-enables the MC clients before returning regardless of whether the reset was successful or not. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
parent
fd909c3718
commit
25b2ec5b64
@ -2086,12 +2086,13 @@ int r100_asic_reset(struct radeon_device *rdev)
|
|||||||
{
|
{
|
||||||
struct r100_mc_save save;
|
struct r100_mc_save save;
|
||||||
u32 status, tmp;
|
u32 status, tmp;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
r100_mc_stop(rdev, &save);
|
|
||||||
status = RREG32(R_000E40_RBBM_STATUS);
|
status = RREG32(R_000E40_RBBM_STATUS);
|
||||||
if (!G_000E40_GUI_ACTIVE(status)) {
|
if (!G_000E40_GUI_ACTIVE(status)) {
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
r100_mc_stop(rdev, &save);
|
||||||
status = RREG32(R_000E40_RBBM_STATUS);
|
status = RREG32(R_000E40_RBBM_STATUS);
|
||||||
dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
|
dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
|
||||||
/* stop CP */
|
/* stop CP */
|
||||||
@ -2131,11 +2132,11 @@ int r100_asic_reset(struct radeon_device *rdev)
|
|||||||
G_000E40_TAM_BUSY(status) || G_000E40_PB_BUSY(status)) {
|
G_000E40_TAM_BUSY(status) || G_000E40_PB_BUSY(status)) {
|
||||||
dev_err(rdev->dev, "failed to reset GPU\n");
|
dev_err(rdev->dev, "failed to reset GPU\n");
|
||||||
rdev->gpu_lockup = true;
|
rdev->gpu_lockup = true;
|
||||||
return -1;
|
ret = -1;
|
||||||
}
|
} else
|
||||||
|
dev_info(rdev->dev, "GPU reset succeed\n");
|
||||||
r100_mc_resume(rdev, &save);
|
r100_mc_resume(rdev, &save);
|
||||||
dev_info(rdev->dev, "GPU reset succeed\n");
|
return ret;
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void r100_set_common_regs(struct radeon_device *rdev)
|
void r100_set_common_regs(struct radeon_device *rdev)
|
||||||
|
@ -405,12 +405,13 @@ int r300_asic_reset(struct radeon_device *rdev)
|
|||||||
{
|
{
|
||||||
struct r100_mc_save save;
|
struct r100_mc_save save;
|
||||||
u32 status, tmp;
|
u32 status, tmp;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
r100_mc_stop(rdev, &save);
|
|
||||||
status = RREG32(R_000E40_RBBM_STATUS);
|
status = RREG32(R_000E40_RBBM_STATUS);
|
||||||
if (!G_000E40_GUI_ACTIVE(status)) {
|
if (!G_000E40_GUI_ACTIVE(status)) {
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
r100_mc_stop(rdev, &save);
|
||||||
status = RREG32(R_000E40_RBBM_STATUS);
|
status = RREG32(R_000E40_RBBM_STATUS);
|
||||||
dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
|
dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
|
||||||
/* stop CP */
|
/* stop CP */
|
||||||
@ -451,11 +452,11 @@ int r300_asic_reset(struct radeon_device *rdev)
|
|||||||
if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {
|
if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {
|
||||||
dev_err(rdev->dev, "failed to reset GPU\n");
|
dev_err(rdev->dev, "failed to reset GPU\n");
|
||||||
rdev->gpu_lockup = true;
|
rdev->gpu_lockup = true;
|
||||||
return -1;
|
ret = -1;
|
||||||
}
|
} else
|
||||||
|
dev_info(rdev->dev, "GPU reset succeed\n");
|
||||||
r100_mc_resume(rdev, &save);
|
r100_mc_resume(rdev, &save);
|
||||||
dev_info(rdev->dev, "GPU reset succeed\n");
|
return ret;
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -339,16 +339,16 @@ void rs600_bm_disable(struct radeon_device *rdev)
|
|||||||
|
|
||||||
int rs600_asic_reset(struct radeon_device *rdev)
|
int rs600_asic_reset(struct radeon_device *rdev)
|
||||||
{
|
{
|
||||||
u32 status, tmp;
|
|
||||||
|
|
||||||
struct rv515_mc_save save;
|
struct rv515_mc_save save;
|
||||||
|
u32 status, tmp;
|
||||||
|
int ret = 0;
|
||||||
|
|
||||||
/* Stops all mc clients */
|
|
||||||
rv515_mc_stop(rdev, &save);
|
|
||||||
status = RREG32(R_000E40_RBBM_STATUS);
|
status = RREG32(R_000E40_RBBM_STATUS);
|
||||||
if (!G_000E40_GUI_ACTIVE(status)) {
|
if (!G_000E40_GUI_ACTIVE(status)) {
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
/* Stops all mc clients */
|
||||||
|
rv515_mc_stop(rdev, &save);
|
||||||
status = RREG32(R_000E40_RBBM_STATUS);
|
status = RREG32(R_000E40_RBBM_STATUS);
|
||||||
dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
|
dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status);
|
||||||
/* stop CP */
|
/* stop CP */
|
||||||
@ -392,11 +392,11 @@ int rs600_asic_reset(struct radeon_device *rdev)
|
|||||||
if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {
|
if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) {
|
||||||
dev_err(rdev->dev, "failed to reset GPU\n");
|
dev_err(rdev->dev, "failed to reset GPU\n");
|
||||||
rdev->gpu_lockup = true;
|
rdev->gpu_lockup = true;
|
||||||
return -1;
|
ret = -1;
|
||||||
}
|
} else
|
||||||
|
dev_info(rdev->dev, "GPU reset succeed\n");
|
||||||
rv515_mc_resume(rdev, &save);
|
rv515_mc_resume(rdev, &save);
|
||||||
dev_info(rdev->dev, "GPU reset succeed\n");
|
return ret;
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
Loading…
Reference in New Issue
Block a user