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arm64: kill config_sctlr_el1()

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Now that we have sysreg_clear_set(), we can consistently use this
instead of config_sctlr_el1().

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Dave Martin <dave.martin@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This commit is contained in:
Mark Rutland 2018-07-11 14:56:38 +01:00 committed by Will Deacon
parent 1c312e84c2
commit 25be597ada
5 changed files with 7 additions and 18 deletions
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10
arch/arm64/include/asm/sysreg.h
View File

@ -742,16 +742,6 @@ asm(
write_sysreg(__scs_new, sysreg); \ write_sysreg(__scs_new, sysreg); \
} while (0) } while (0)
static inline void config_sctlr_el1(u32 clear, u32 set)
{
u32 val;
val = read_sysreg(sctlr_el1);
val &= ~clear;
val |= set;
write_sysreg(val, sctlr_el1);
}
#endif #endif
#endif /* __ASM_SYSREG_H */ #endif /* __ASM_SYSREG_H */

8
arch/arm64/kernel/armv8_deprecated.c
View File

@ -511,9 +511,9 @@ ret:
static int cp15_barrier_set_hw_mode(bool enable) static int cp15_barrier_set_hw_mode(bool enable)
{ {
if (enable) if (enable)
config_sctlr_el1(0, SCTLR_EL1_CP15BEN); sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_CP15BEN);
else else
config_sctlr_el1(SCTLR_EL1_CP15BEN, 0); sysreg_clear_set(sctlr_el1, SCTLR_EL1_CP15BEN, 0);
return 0; return 0;
} }
@ -548,9 +548,9 @@ static int setend_set_hw_mode(bool enable)
return -EINVAL; return -EINVAL;
if (enable) if (enable)
config_sctlr_el1(SCTLR_EL1_SED, 0); sysreg_clear_set(sctlr_el1, SCTLR_EL1_SED, 0);
else else
config_sctlr_el1(0, SCTLR_EL1_SED); sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_SED);
return 0; return 0;
} }

3
arch/arm64/kernel/cpu_errata.c
View File

@ -82,8 +82,7 @@ has_mismatched_cache_type(const struct arm64_cpu_capabilities *entry,
static void static void
cpu_enable_trap_ctr_access(const struct arm64_cpu_capabilities *__unused) cpu_enable_trap_ctr_access(const struct arm64_cpu_capabilities *__unused)
{ {
/* Clear SCTLR_EL1.UCT */ sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCT, 0);
config_sctlr_el1(SCTLR_EL1_UCT, 0);
} }
atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1); atomic_t arm64_el2_vector_last_slot = ATOMIC_INIT(-1);

2
arch/arm64/kernel/traps.c
View File

@ -411,7 +411,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused) void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)
{ {
config_sctlr_el1(SCTLR_EL1_UCI, 0); sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCI, 0);
} }
#define __user_cache_maint(insn, address, res) \ #define __user_cache_maint(insn, address, res) \

2
arch/arm64/mm/fault.c
View File

@ -879,7 +879,7 @@ void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused)
*/ */
WARN_ON_ONCE(in_interrupt()); WARN_ON_ONCE(in_interrupt());
config_sctlr_el1(SCTLR_EL1_SPAN, 0); sysreg_clear_set(sctlr_el1, SCTLR_EL1_SPAN, 0);
asm(SET_PSTATE_PAN(1)); asm(SET_PSTATE_PAN(1));
} }
#endif /* CONFIG_ARM64_PAN */ #endif /* CONFIG_ARM64_PAN */